From 65914cdda9724b190b877ad5ef2cd4dbcddcabd0 Mon Sep 17 00:00:00 2001 From: Johan Mabille Date: Wed, 15 Jul 2026 15:49:41 +0200 Subject: [PATCH 1/4] Remove XSIMD_IF_CONSTEXPR macros, use if constexpr instead --- .../xsimd/arch/common/xsimd_common_bit.hpp | 14 +- .../xsimd/arch/common/xsimd_common_memory.hpp | 10 +- include/xsimd/arch/xsimd_avx.hpp | 100 +++---- include/xsimd/arch/xsimd_avx2.hpp | 230 ++++++++--------- include/xsimd/arch/xsimd_avx2_128.hpp | 20 +- include/xsimd/arch/xsimd_avx512bw.hpp | 130 +++++----- include/xsimd/arch/xsimd_avx512dq.hpp | 6 +- include/xsimd/arch/xsimd_avx512f.hpp | 218 ++++++++-------- include/xsimd/arch/xsimd_avx512vbmi2.hpp | 8 +- include/xsimd/arch/xsimd_avx512vl_128.hpp | 70 ++--- include/xsimd/arch/xsimd_avx512vl_256.hpp | 74 +++--- include/xsimd/arch/xsimd_avx_128.hpp | 8 +- include/xsimd/arch/xsimd_neon.hpp | 42 +-- include/xsimd/arch/xsimd_rvv.hpp | 8 +- include/xsimd/arch/xsimd_sse2.hpp | 244 +++++++++--------- include/xsimd/arch/xsimd_sse4_1.hpp | 74 +++--- include/xsimd/arch/xsimd_ssse3.hpp | 12 +- include/xsimd/arch/xsimd_vsx.hpp | 8 +- include/xsimd/arch/xsimd_vxe.hpp | 8 +- include/xsimd/arch/xsimd_wasm.hpp | 202 +++++++-------- include/xsimd/config/xsimd_macros.hpp | 15 -- include/xsimd/types/xsimd_batch.hpp | 8 +- test/test_batch.cpp | 2 +- 23 files changed, 748 insertions(+), 763 deletions(-) diff --git a/include/xsimd/arch/common/xsimd_common_bit.hpp b/include/xsimd/arch/common/xsimd_common_bit.hpp index 5cd99c1cf..1c03f595a 100644 --- a/include/xsimd/arch/common/xsimd_common_bit.hpp +++ b/include/xsimd/arch/common/xsimd_common_bit.hpp @@ -57,7 +57,7 @@ namespace xsimd #if XSIMD_HAS_BUILTIN(__builtin_popcountg) return __builtin_popcountg(x); #else - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { #if XSIMD_HAS_BUILTIN(__builtin_popcount) return __builtin_popcount(x); @@ -68,7 +68,7 @@ namespace xsimd return ((uint64_t)x * 0x200040008001ULL & 0x111111111111111ULL) % 0xf; #endif } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { #if XSIMD_HAS_BUILTIN(__builtin_popcount) return __builtin_popcount(x); @@ -85,7 +85,7 @@ namespace xsimd + (((v & 0xfff000) >> 12) * msb12 & mask5) % 0x1f; #endif } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { #if XSIMD_HAS_BUILTIN(__builtin_popcount) return __builtin_popcount(x); @@ -132,7 +132,7 @@ namespace xsimd if (x == 0) return sizeof(T) * CHAR_BIT; - XSIMD_IF_CONSTEXPR(sizeof(T) <= 4) + if constexpr(sizeof(T) <= 4) { #if XSIMD_HAS_BUILTIN(__builtin_clz) return __builtin_clz((unsigned int)x) - (4 - sizeof(T)) * CHAR_BIT; @@ -144,11 +144,11 @@ namespace xsimd x |= x >> 1; x |= x >> 2; x |= x >> 4; - XSIMD_IF_CONSTEXPR(sizeof(T) >= 2) + if constexpr(sizeof(T) >= 2) { x |= x >> 8; } - XSIMD_IF_CONSTEXPR(sizeof(T) >= 4) + if constexpr(sizeof(T) >= 4) { x |= x >> 16; } @@ -192,7 +192,7 @@ namespace xsimd if (x == 0) return sizeof(T) * CHAR_BIT; - XSIMD_IF_CONSTEXPR(sizeof(T) <= 4) + if constexpr(sizeof(T) <= 4) { #if XSIMD_HAS_BUILTIN(__builtin_ctz) return __builtin_ctz((unsigned int)x); diff --git a/include/xsimd/arch/common/xsimd_common_memory.hpp b/include/xsimd/arch/common/xsimd_common_memory.hpp index a77b5aa1c..3b053fda7 100644 --- a/include/xsimd/arch/common/xsimd_common_memory.hpp +++ b/include/xsimd/arch/common/xsimd_common_memory.hpp @@ -655,27 +655,27 @@ namespace xsimd static_assert(bsize == batch::size, "valid shuffle"); // Detect common patterns - XSIMD_IF_CONSTEXPR(detail::is_swizzle_fst(bsize, Indices...)) + if constexpr(detail::is_swizzle_fst(bsize, Indices...)) { return swizzle(x, batch_constant= bsize) ? 0 /* never happens */ : Indices)...>()); } - XSIMD_IF_CONSTEXPR(detail::is_swizzle_snd(bsize, Indices...)) + if constexpr(detail::is_swizzle_snd(bsize, Indices...)) { return swizzle(y, batch_constant= bsize) ? (Indices - bsize) : 0 /* never happens */)...>()); } - XSIMD_IF_CONSTEXPR(detail::is_zip_lo(bsize, Indices...)) + if constexpr(detail::is_zip_lo(bsize, Indices...)) { return zip_lo(x, y); } - XSIMD_IF_CONSTEXPR(detail::is_zip_hi(bsize, Indices...)) + if constexpr(detail::is_zip_hi(bsize, Indices...)) { return zip_hi(x, y); } - XSIMD_IF_CONSTEXPR(detail::is_select(bsize, Indices...)) + if constexpr(detail::is_select(bsize, Indices...)) { return select(batch_bool_constant(), x, y); } diff --git a/include/xsimd/arch/xsimd_avx.hpp b/include/xsimd/arch/xsimd_avx.hpp index e048e4d37..52bbf6972 100644 --- a/include/xsimd/arch/xsimd_avx.hpp +++ b/include/xsimd/arch/xsimd_avx.hpp @@ -420,19 +420,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch broadcast(T val, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm256_set1_epi8(val); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm256_set1_epi16(val); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm256_set1_epi32(val); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm256_set1_epi64x(val); } @@ -641,7 +641,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch_bool from_mask(batch_bool const&, uint64_t mask, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { alignas(A::alignment()) static const uint32_t lut32[] = { 0x00000000, @@ -667,7 +667,7 @@ namespace xsimd lut32[(mask >> 16) & 0xF], lut32[(mask >> 20) & 0xF], lut32[(mask >> 24) & 0xF], lut32[mask >> 28]); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { alignas(A::alignment()) static const uint64_t lut64[] = { 0x0000000000000000ul, @@ -690,11 +690,11 @@ namespace xsimd assert(!(mask & ~0xFFFFul) && "inbound mask"); return _mm256_setr_epi64x(lut64[mask & 0xF], lut64[(mask >> 4) & 0xF], lut64[(mask >> 8) & 0xF], lut64[(mask >> 12) & 0xF]); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm256_castps_si256(from_mask(batch_bool {}, mask, avx {})); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm256_castpd_si256(from_mask(batch_bool {}, mask, avx {})); } @@ -765,19 +765,19 @@ namespace xsimd template ::value>> XSIMD_INLINE T first(batch const& self, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return static_cast(_mm_cvtsi128_si32(_mm256_castsi256_si128(self)) & 0xFF); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return static_cast(_mm_cvtsi128_si32(_mm256_castsi256_si128(self)) & 0xFFFF); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return static_cast(_mm_cvtsi128_si32(_mm256_castsi256_si128(self))); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { batch low = _mm256_castsi256_si128(self); return first(low, sse4_2 {}); @@ -793,7 +793,7 @@ namespace xsimd template XSIMD_INLINE float get(batch const& self, ::xsimd::index, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(I == 0) { return first(self, avx {}); } + if constexpr(I == 0) { return first(self, avx {}); } constexpr size_t elements_per_lane = batch::size; constexpr size_t lane = I / elements_per_lane; constexpr size_t sub_index = I % elements_per_lane; @@ -804,7 +804,7 @@ namespace xsimd template XSIMD_INLINE double get(batch const& self, ::xsimd::index, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(I == 0) { return first(self, avx {}); } + if constexpr(I == 0) { return first(self, avx {}); } constexpr size_t elements_per_lane = batch::size; constexpr size_t lane = I / elements_per_lane; constexpr size_t sub_index = I % elements_per_lane; @@ -815,7 +815,7 @@ namespace xsimd template ::value>> XSIMD_INLINE T get(batch const& self, ::xsimd::index, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(I == 0) { return first(self, avx {}); } + if constexpr(I == 0) { return first(self, avx {}); } constexpr size_t elements_per_lane = batch::size; constexpr size_t lane = I / elements_per_lane; constexpr size_t sub_index = I % elements_per_lane; @@ -828,15 +828,15 @@ namespace xsimd XSIMD_INLINE batch insert(batch const& self, T val, index pos, requires_arch) noexcept { #if !defined(_MSC_VER) || _MSC_VER > 1900 - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm256_insert_epi8(self, val, I); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm256_insert_epi16(self, val, I); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm256_insert_epi32(self, val, I); } @@ -1021,7 +1021,7 @@ namespace xsimd XSIMD_INLINE std::enable_if_t::value && (sizeof(T) == 4 || sizeof(T) == 8), batch> load_masked(T const* mem, batch_bool mask, convert, Mode, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return bitwise_cast(batch(_mm256_maskload_ps(reinterpret_cast(mem), __m256i(mask)))); } @@ -1040,7 +1040,7 @@ namespace xsimd using half_arch = typename half_batch::arch_type; // exactly the lower 128-bit half: one plain load, upper lanes zero - XSIMD_IF_CONSTEXPR(mask.prefix() == half_size) + if constexpr(mask.prefix() == half_size) { // cross-check the plain move via countr_one/countl_zero (independent of prefix()) assert(mask.countr_one() >= half_size && mask.countl_zero() >= half_size && "lower half fully active, upper empty"); @@ -1048,7 +1048,7 @@ namespace xsimd } // lower 128-bit half: stay in the value domain so the half kernel can // lower pure-prefix shapes to plain narrow moves (movss/movlps/movsd) - else XSIMD_IF_CONSTEXPR(mask.countl_zero() >= half_size) + else if constexpr(mask.countl_zero() >= half_size) { constexpr auto mlo = ::xsimd::detail::lower_half(mask); const auto lo = load_masked(mem, mlo, convert {}, Mode {}, half_arch {}); @@ -1056,7 +1056,7 @@ namespace xsimd } // prefix crossing the 128-bit boundary: plain lower half + // prefix-masked upper half (mirrors the store side) - else XSIMD_IF_CONSTEXPR(mask.prefix() > half_size && mask.prefix() < batch::size) + else if constexpr(mask.prefix() > half_size && mask.prefix() < batch::size) { // the plain lower-half load reads every lower lane, so they must all be active assert(mask.countr_one() >= half_size && "plain lower-half load needs the lower half fully active"); @@ -1066,13 +1066,13 @@ namespace xsimd return detail::merge_sse(lo.data, hi.data); } // exactly the upper 128-bit half: one plain load into the upper lanes - else XSIMD_IF_CONSTEXPR(mask.suffix() == half_size) + else if constexpr(mask.suffix() == half_size) { assert(mask.countl_one() >= half_size && mask.countr_zero() >= half_size && "upper half fully active, lower empty"); return detail::zero_extend(half_batch::load(mem + half_size, Mode {})); } // upper 128-bit half - else XSIMD_IF_CONSTEXPR(mask.countr_zero() >= half_size) + else if constexpr(mask.countr_zero() >= half_size) { constexpr auto mhi = ::xsimd::detail::upper_half(mask); const auto hi = load_masked(mem + half_size, mhi, convert {}, Mode {}, half_arch {}); @@ -1116,7 +1116,7 @@ namespace xsimd using half_arch = typename half_batch::arch_type; // exactly the lower 128-bit half: one plain store - XSIMD_IF_CONSTEXPR(mask.prefix() == half_size) + if constexpr(mask.prefix() == half_size) { // a plain store writes every lower lane and no upper lane, so the mask // must have the lower half fully active and the upper half empty @@ -1126,7 +1126,7 @@ namespace xsimd } // prefix crossing the 128-bit boundary: plain lower half + prefix-masked // upper half. Never emits vmaskmov, which does not store-forward. - else XSIMD_IF_CONSTEXPR(mask.prefix() > half_size && mask.prefix() < batch::size) + else if constexpr(mask.prefix() > half_size && mask.prefix() < batch::size) { assert(mask.countr_one() >= half_size && "plain lower-half store needs the lower half fully active"); const half_batch lo = detail::lower_half(src); @@ -1136,21 +1136,21 @@ namespace xsimd store_masked(mem + half_size, hi, mhi, Mode {}, half_arch {}); } // exactly the upper 128-bit half: one plain store - else XSIMD_IF_CONSTEXPR(mask.suffix() == half_size) + else if constexpr(mask.suffix() == half_size) { assert(mask.countl_one() >= half_size && mask.countr_zero() >= half_size && "upper half fully active, lower empty"); const half_batch hi = detail::upper_half(src); hi.store(mem + half_size, Mode {}); } // lower 128-bit half - else XSIMD_IF_CONSTEXPR(mask.countl_zero() >= half_size) + else if constexpr(mask.countl_zero() >= half_size) { constexpr auto mlo = ::xsimd::detail::lower_half(mask); const half_batch lo = detail::lower_half(src); store_masked(mem, lo, mlo, Mode {}, half_arch {}); } // upper 128-bit half - else XSIMD_IF_CONSTEXPR(mask.countr_zero() >= half_size) + else if constexpr(mask.countr_zero() >= half_size) { constexpr auto mhi = ::xsimd::detail::upper_half(mask); const half_batch hi = detail::upper_half(src); @@ -1182,7 +1182,7 @@ namespace xsimd XSIMD_INLINE std::enable_if_t::value && (sizeof(T) == 4 || sizeof(T) == 8), void> store_masked(T* mem, batch const& src, batch_bool mask, Mode, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { _mm256_maskstore_ps(reinterpret_cast(mem), __m256i(mask), bitwise_cast(src)); } @@ -1255,16 +1255,16 @@ namespace xsimd template ::value>> XSIMD_INLINE uint64_t mask(batch_bool const& self, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1 || sizeof(T) == 2) + if constexpr(sizeof(T) == 1 || sizeof(T) == 2) { __m128i self_low = detail::lower_half(self), self_high = detail::upper_half(self); return mask(batch_bool(self_low), sse4_2 {}) | (mask(batch_bool(self_high), sse4_2 {}) << (128 / (8 * sizeof(T)))); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm256_movemask_ps(_mm256_castsi256_ps(self)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm256_movemask_pd(_mm256_castsi256_pd(self)); } @@ -1863,16 +1863,16 @@ namespace xsimd constexpr bool is_dup_low = detail::is_dup_lo(mask); constexpr bool is_dup_hi = detail::is_dup_hi(mask); constexpr bool is_dup = is_dup_low || is_dup_hi; - XSIMD_IF_CONSTEXPR(is_identity) + if constexpr(is_identity) { return self; } - XSIMD_IF_CONSTEXPR(is_dup) + if constexpr(is_dup) { constexpr auto control = is_dup_low ? 0x00 : 0x11; constexpr auto is_dup_identity = is_dup_low ? detail::is_identity() : detail::is_identity(); auto split = _mm256_permute2f128_ps(self, self, control); - XSIMD_IF_CONSTEXPR(!is_dup_identity) + if constexpr(!is_dup_identity) { constexpr auto shuffle_mask = is_dup_low ? detail::mod_shuffle(V0, V1, V2, V3) : detail::mod_shuffle(V4 - 4, V5 - 4, V6 - 4, V7 - 4); split = _mm256_permute_ps(split, shuffle_mask); @@ -1880,12 +1880,12 @@ namespace xsimd return split; } constexpr auto lane_mask = mask % std::integral_constant(); - XSIMD_IF_CONSTEXPR(detail::is_only_from_lo(mask)) + if constexpr(detail::is_only_from_lo(mask)) { __m256 broadcast = _mm256_permute2f128_ps(self, self, 0x00); // [low | low] return _mm256_permutevar_ps(broadcast, lane_mask.as_batch()); } - XSIMD_IF_CONSTEXPR(detail::is_only_from_hi(mask)) + if constexpr(detail::is_only_from_hi(mask)) { __m256 broadcast = _mm256_permute2f128_ps(self, self, 0x11); // [high | high] return _mm256_permutevar_ps(broadcast, lane_mask.as_batch()); @@ -1916,20 +1916,20 @@ namespace xsimd { // cannot use detail::mod_shuffle as the mod and shift are different in this case constexpr auto imm = ((V0 % 2) << 0) | ((V1 % 2) << 1) | ((V2 % 2) << 2) | ((V3 % 2) << 3); - XSIMD_IF_CONSTEXPR(detail::is_identity(mask)) + if constexpr(detail::is_identity(mask)) { return self; } - XSIMD_IF_CONSTEXPR(!detail::is_cross_lane(mask)) + if constexpr(!detail::is_cross_lane(mask)) { return _mm256_permute_pd(self, imm); } - XSIMD_IF_CONSTEXPR(detail::is_only_from_lo(mask)) + if constexpr(detail::is_only_from_lo(mask)) { __m256d broadcast = _mm256_permute2f128_pd(self, self, 0x00); // [low | low] return _mm256_permute_pd(broadcast, imm); } - XSIMD_IF_CONSTEXPR(detail::is_only_from_hi(mask)) + if constexpr(detail::is_only_from_hi(mask)) { __m256d broadcast = _mm256_permute2f128_pd(self, self, 0x11); // [high | high] return _mm256_permute_pd(broadcast, imm); @@ -2141,7 +2141,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch zip_hi(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1 || sizeof(T) == 2) + if constexpr(sizeof(T) == 1 || sizeof(T) == 2) { // extract high word __m128i self_hi = _mm256_extractf128_si256(self, 1); @@ -2149,7 +2149,7 @@ namespace xsimd // interleave __m128i res_lo, res_hi; - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { res_lo = _mm_unpacklo_epi8(self_hi, other_hi); res_hi = _mm_unpackhi_epi8(self_hi, other_hi); @@ -2167,13 +2167,13 @@ namespace xsimd _mm_castsi128_ps(res_hi), 1)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { auto lo = _mm256_unpacklo_ps(_mm256_castsi256_ps(self), _mm256_castsi256_ps(other)); auto hi = _mm256_unpackhi_ps(_mm256_castsi256_ps(self), _mm256_castsi256_ps(other)); return _mm256_castps_si256(_mm256_permute2f128_ps(lo, hi, 0x31)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { auto lo = _mm256_unpacklo_pd(_mm256_castsi256_pd(self), _mm256_castsi256_pd(other)); auto hi = _mm256_unpackhi_pd(_mm256_castsi256_pd(self), _mm256_castsi256_pd(other)); @@ -2204,7 +2204,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch zip_lo(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1 || sizeof(T) == 2) + if constexpr(sizeof(T) == 1 || sizeof(T) == 2) { // extract low word __m128i self_lo = _mm256_extractf128_si256(self, 0); @@ -2212,7 +2212,7 @@ namespace xsimd // interleave __m128i res_lo, res_hi; - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { res_lo = _mm_unpacklo_epi8(self_lo, other_lo); res_hi = _mm_unpackhi_epi8(self_lo, other_lo); @@ -2230,13 +2230,13 @@ namespace xsimd _mm_castsi128_ps(res_hi), 1)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { auto lo = _mm256_unpacklo_ps(_mm256_castsi256_ps(self), _mm256_castsi256_ps(other)); auto hi = _mm256_unpackhi_ps(_mm256_castsi256_ps(self), _mm256_castsi256_ps(other)); return _mm256_castps_si256(_mm256_insertf128_ps(lo, _mm256_castps256_ps128(hi), 1)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { auto lo = _mm256_unpacklo_pd(_mm256_castsi256_pd(self), _mm256_castsi256_pd(other)); auto hi = _mm256_unpackhi_pd(_mm256_castsi256_pd(self), _mm256_castsi256_pd(other)); diff --git a/include/xsimd/arch/xsimd_avx2.hpp b/include/xsimd/arch/xsimd_avx2.hpp index 50d9e1be8..3bba83d4e 100644 --- a/include/xsimd/arch/xsimd_avx2.hpp +++ b/include/xsimd/arch/xsimd_avx2.hpp @@ -33,15 +33,15 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm256_abs_epi8(self); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm256_abs_epi16(self); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm256_abs_epi32(self); } @@ -57,19 +57,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch add(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm256_add_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm256_add_epi16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm256_add_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm256_add_epi64(self, other); } @@ -83,11 +83,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch avgr(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm256_avg_epu8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm256_avg_epu16(self, other); } @@ -101,12 +101,12 @@ namespace xsimd template ::value>> XSIMD_INLINE batch avg(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { auto adj = ((self ^ other) << 7) >> 7; return avgr(self, other, A {}) - adj; } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { auto adj = ((self ^ other) << 15) >> 15; return avgr(self, other, A {}) - adj; @@ -124,7 +124,7 @@ namespace xsimd template XSIMD_INLINE __m256i maskload(T const* mem, __m256i mask) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { static_assert(sizeof(int) == 4, "_mm256_maskload_epi32 requires a 4-byte int"); return _mm256_maskload_epi32(reinterpret_cast(mem), mask); @@ -139,7 +139,7 @@ namespace xsimd template XSIMD_INLINE void maskstore(T* mem, __m256i mask, __m256i src) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { static_assert(sizeof(int) == 4, "_mm256_maskstore_epi32 requires a 4-byte int"); _mm256_maskstore_epi32(reinterpret_cast(mem), mask, src); @@ -238,15 +238,15 @@ namespace xsimd template ::value>> XSIMD_INLINE batch bitwise_lshift(batch const& self, int32_t other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + if constexpr(sizeof(T) == 2) { return _mm256_slli_epi16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm256_slli_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm256_slli_epi64(self, other); } @@ -261,7 +261,7 @@ namespace xsimd { constexpr auto bits = std::numeric_limits::digits + std::numeric_limits::is_signed; static_assert(shift < bits, "Shift must be less than the number of bits in T"); - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { // 8-bit left shift via 16-bit shift + mask __m256i shifted = _mm256_slli_epi16(self, shift); @@ -270,15 +270,15 @@ namespace xsimd const __m256i mask = _mm256_set1_epi8(mask8); return _mm256_and_si256(shifted, mask); } - XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + if constexpr(sizeof(T) == 2) { return _mm256_slli_epi16(self, shift); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm256_slli_epi32(self, shift); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm256_slli_epi64(self, shift); } @@ -287,11 +287,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch bitwise_lshift(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm256_sllv_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm256_sllv_epi64(self, other); } @@ -314,7 +314,7 @@ namespace xsimd // AVX2 only supports 16-bit shifts with a uniform bitshift value, // otherwise emulate using 32-bit shifts. - XSIMD_IF_CONSTEXPR(utils::all_equals(shifts)) + if constexpr(utils::all_equals(shifts)) { return bitwise_lshift(self, req); } @@ -342,7 +342,7 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { __m256i sign_mask = _mm256_set1_epi16((0xFF00 >> other) & 0x00FF); __m256i cmp_is_negative = _mm256_cmpgt_epi8(_mm256_setzero_si256(), self); @@ -353,11 +353,11 @@ namespace xsimd sign_mask, cmp_is_negative), _mm256_andnot_si256(sign_mask, res)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm256_srai_epi16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm256_srai_epi32(self, other); } @@ -368,15 +368,15 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + if constexpr(sizeof(T) == 2) { return _mm256_srli_epi16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm256_srli_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm256_srli_epi64(self, other); } @@ -394,7 +394,7 @@ namespace xsimd static_assert(shift < bits, "Shift amount must be less than the number of bits in T"); if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { __m256i sign_mask = _mm256_set1_epi16((0xFF00 >> shift) & 0x00FF); __m256i cmp_is_negative = _mm256_cmpgt_epi8(_mm256_setzero_si256(), self); @@ -405,11 +405,11 @@ namespace xsimd sign_mask, cmp_is_negative), _mm256_andnot_si256(sign_mask, res)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm256_srai_epi16(self, shift); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm256_srai_epi32(self, shift); } @@ -420,7 +420,7 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { // 8-bit left shift via 16-bit shift + mask const __m256i shifted = _mm256_srli_epi16(self, shift); @@ -429,15 +429,15 @@ namespace xsimd const __m256i mask = _mm256_set1_epi8(mask8); return _mm256_and_si256(shifted, mask); } - XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + if constexpr(sizeof(T) == 2) { return _mm256_srli_epi16(self, shift); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm256_srli_epi32(self, shift); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm256_srli_epi64(self, shift); } @@ -449,7 +449,7 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm256_srav_epi32(self, other); } @@ -460,11 +460,11 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm256_srlv_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm256_srlv_epi64(self, other); } @@ -545,19 +545,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch_bool eq(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm256_cmpeq_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm256_cmpeq_epi16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm256_cmpeq_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm256_cmpeq_epi64(self, other); } @@ -630,19 +630,19 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm256_cmpgt_epi8(other, self); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm256_cmpgt_epi16(other, self); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm256_cmpgt_epi32(other, self); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm256_cmpgt_epi64(other, self); } @@ -686,18 +686,18 @@ namespace xsimd template ::value>> XSIMD_INLINE batch_bool load_unaligned(bool const* mem, batch_bool, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return { _mm256_sub_epi8(_mm256_set1_epi8(0), _mm256_loadu_si256((__m256i const*)mem)) }; } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { auto bpack = _mm_loadu_si128((__m128i const*)mem); return { _mm256_sub_epi16(_mm256_set1_epi8(0), _mm256_cvtepu8_epi16(bpack)) }; } // GCC <12 have missing or buggy unaligned load intrinsics; use memcpy to work around this. // GCC/Clang/MSVC will turn it into the correct load. - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { #if defined(__x86_64__) uint64_t tmp; @@ -709,7 +709,7 @@ namespace xsimd #endif return { _mm256_sub_epi32(_mm256_set1_epi8(0), _mm256_cvtepu8_epi32(val)) }; } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { uint32_t tmp; memcpy(&tmp, mem, sizeof(tmp)); @@ -738,11 +738,11 @@ namespace xsimd template ::value>> XSIMD_INLINE uint64_t mask(batch_bool const& self, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return 0xFFFFFFFF & (uint64_t)_mm256_movemask_epi8(self); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { uint64_t mask8 = 0xFFFFFFFF & (uint64_t)_mm256_movemask_epi8(self); return detail::mask_lut(mask8) | (detail::mask_lut(mask8 >> 8) << 4) | (detail::mask_lut(mask8 >> 16) << 8) | (detail::mask_lut(mask8 >> 24) << 12); @@ -759,15 +759,15 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm256_max_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm256_max_epi16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm256_max_epi32(self, other); } @@ -778,15 +778,15 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm256_max_epu8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm256_max_epu16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm256_max_epu32(self, other); } @@ -803,15 +803,15 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm256_min_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm256_min_epi16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm256_min_epi32(self, other); } @@ -822,15 +822,15 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm256_min_epu8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm256_min_epu16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm256_min_epu32(self, other); } @@ -845,7 +845,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch mul(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { __m256i mask_hi = _mm256_set1_epi32(0xFF00FF00); __m256i res_lo = _mm256_mullo_epi16(self, other); @@ -855,15 +855,15 @@ namespace xsimd __m256i res = _mm256_blendv_epi8(res_lo, res_hi, mask_hi); return res; } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm256_mullo_epi16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm256_mullo_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm256_add_epi64( _mm256_mul_epu32(self, other), @@ -966,7 +966,7 @@ namespace xsimd template ::value>> XSIMD_INLINE T reduce_add(batch const& self, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { __m256i tmp1 = _mm256_hadd_epi32(self, self); __m256i tmp2 = _mm256_hadd_epi32(tmp1, tmp1); @@ -974,7 +974,7 @@ namespace xsimd __m128i tmp4 = _mm_add_epi32(_mm256_castsi256_si128(tmp2), tmp3); return _mm_cvtsi128_si32(tmp4); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { __m256i tmp1 = _mm256_shuffle_epi32(self, 0x0E); __m256i tmp2 = _mm256_add_epi64(self, tmp1); @@ -1040,11 +1040,11 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm256_adds_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm256_adds_epi16(self, other); } @@ -1055,11 +1055,11 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm256_adds_epu8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm256_adds_epu16(self, other); } @@ -1074,19 +1074,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch select(batch_bool const& cond, batch const& true_br, batch const& false_br, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm256_blendv_epi8(false_br, true_br, cond); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm256_blendv_epi8(false_br, true_br, cond); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm256_blendv_epi8(false_br, true_br, cond); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm256_blendv_epi8(false_br, true_br, cond); } @@ -1101,12 +1101,12 @@ namespace xsimd // FIXME: for some reason mask here is not considered as an immediate, // but it's okay for _mm256_blend_epi32 // case 2: return _mm256_blend_epi16(false_br, true_br, mask); - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { constexpr int mask = batch_bool_constant::mask(); return _mm256_blend_epi32(false_br, true_br, mask); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { constexpr int mask = batch_bool_constant::mask(); constexpr int imask = detail::interleave(mask); @@ -1188,7 +1188,7 @@ namespace xsimd { // GCC <12 have missing or buggy unaligned store intrinsics; use memcpy to work around this. // GCC/Clang/MSVC will turn it into the correct store. - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { // negate mask to convert to 0 or 1 auto val = _mm256_sub_epi8(_mm256_set1_epi8(0), b); @@ -1198,12 +1198,12 @@ namespace xsimd auto b_hi = _mm256_extractf128_si256(b, 1); auto b_lo = _mm256_castsi256_si128(b); - XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + if constexpr(sizeof(T) == 2) { auto val = _mm_sub_epi8(_mm_set1_epi8(0), _mm_packs_epi16(b_lo, b_hi)); memcpy(mem, &val, sizeof(val)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { auto pack_16 = _mm_packs_epi32(b_lo, b_hi); auto val = _mm_sub_epi8(_mm_set1_epi8(0), _mm_packs_epi16(pack_16, pack_16)); @@ -1214,7 +1214,7 @@ namespace xsimd memcpy(mem, &val, sizeof(uint64_t)); #endif } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { uint32_t mask = _mm256_movemask_epi8(_mm256_srli_epi64(b, 56)); memcpy(mem, &mask, sizeof(mask)); @@ -1242,11 +1242,11 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm256_subs_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm256_subs_epi16(self, other); } @@ -1257,11 +1257,11 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm256_subs_epu8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm256_subs_epu16(self, other); } @@ -1276,19 +1276,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch sub(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm256_sub_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm256_sub_epi16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm256_sub_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm256_sub_epi64(self, other); } @@ -1378,23 +1378,23 @@ namespace xsimd { static_assert(sizeof...(Vals) == 32, "Must contain as many uint8_t as can fit in avx register"); - XSIMD_IF_CONSTEXPR(detail::is_identity(mask)) + if constexpr(detail::is_identity(mask)) { return self; } constexpr auto lane_mask = mask % std::integral_constant(); - XSIMD_IF_CONSTEXPR(!detail::is_cross_lane(mask)) + if constexpr(!detail::is_cross_lane(mask)) { return _mm256_shuffle_epi8(self, lane_mask.as_batch()); } - XSIMD_IF_CONSTEXPR(detail::is_only_from_lo(mask)) + if constexpr(detail::is_only_from_lo(mask)) { __m256i broadcast = _mm256_permute2x128_si256(self, self, 0x00); // [low | low] return _mm256_shuffle_epi8(broadcast, lane_mask.as_batch()); } - XSIMD_IF_CONSTEXPR(detail::is_only_from_hi(mask)) + if constexpr(detail::is_only_from_hi(mask)) { __m256i broadcast = _mm256_permute2x128_si256(self, self, 0x11); // [high | high] return _mm256_shuffle_epi8(broadcast, lane_mask.as_batch()); @@ -1454,11 +1454,11 @@ namespace xsimd template XSIMD_INLINE batch swizzle(batch const& self, batch_constant mask, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(detail::is_identity(mask)) + if constexpr(detail::is_identity(mask)) { return self; } - XSIMD_IF_CONSTEXPR(!detail::is_cross_lane(mask)) + if constexpr(!detail::is_cross_lane(mask)) { constexpr auto lane_mask = mask % std::integral_constant(); // Cheaper intrinsics when not crossing lanes @@ -1479,11 +1479,11 @@ namespace xsimd template XSIMD_INLINE batch swizzle(batch const& self, batch_constant mask, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(detail::is_identity(mask)) + if constexpr(detail::is_identity(mask)) { return self; } - XSIMD_IF_CONSTEXPR(!detail::is_cross_lane(mask)) + if constexpr(!detail::is_cross_lane(mask)) { constexpr uint8_t lane_mask = (V0 % 2) | ((V1 % 2) << 1) | ((V2 % 2) << 2) | ((V3 % 2) << 3); // Cheaper intrinsics when not crossing lanes @@ -1504,25 +1504,25 @@ namespace xsimd template ::value>> XSIMD_INLINE batch zip_hi(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { auto lo = _mm256_unpacklo_epi8(self, other); auto hi = _mm256_unpackhi_epi8(self, other); return _mm256_permute2f128_si256(lo, hi, 0x31); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { auto lo = _mm256_unpacklo_epi16(self, other); auto hi = _mm256_unpackhi_epi16(self, other); return _mm256_permute2f128_si256(lo, hi, 0x31); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { auto lo = _mm256_unpacklo_epi32(self, other); auto hi = _mm256_unpackhi_epi32(self, other); return _mm256_permute2f128_si256(lo, hi, 0x31); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { auto lo = _mm256_unpacklo_epi64(self, other); auto hi = _mm256_unpackhi_epi64(self, other); @@ -1539,25 +1539,25 @@ namespace xsimd template ::value>> XSIMD_INLINE batch zip_lo(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { auto lo = _mm256_unpacklo_epi8(self, other); auto hi = _mm256_unpackhi_epi8(self, other); return _mm256_inserti128_si256(lo, _mm256_castsi256_si128(hi), 1); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { auto lo = _mm256_unpacklo_epi16(self, other); auto hi = _mm256_unpackhi_epi16(self, other); return _mm256_inserti128_si256(lo, _mm256_castsi256_si128(hi), 1); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { auto lo = _mm256_unpacklo_epi32(self, other); auto hi = _mm256_unpackhi_epi32(self, other); return _mm256_inserti128_si256(lo, _mm256_castsi256_si128(hi), 1); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { auto lo = _mm256_unpacklo_epi64(self, other); auto hi = _mm256_unpackhi_epi64(self, other); @@ -1577,9 +1577,9 @@ namespace xsimd __m128i x_lo = detail::lower_half(x); __m128i x_hi = detail::upper_half(x); __m256i lo, hi; - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { - XSIMD_IF_CONSTEXPR(std::is_signed::value) + if constexpr(std::is_signed::value) { lo = _mm256_cvtepi32_epi64(x_lo); hi = _mm256_cvtepi32_epi64(x_hi); @@ -1590,9 +1590,9 @@ namespace xsimd hi = _mm256_cvtepu32_epi64(x_hi); } } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { - XSIMD_IF_CONSTEXPR(std::is_signed::value) + if constexpr(std::is_signed::value) { lo = _mm256_cvtepi16_epi32(x_lo); hi = _mm256_cvtepi16_epi32(x_hi); @@ -1603,9 +1603,9 @@ namespace xsimd hi = _mm256_cvtepu16_epi32(x_hi); } } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + else if constexpr(sizeof(T) == 1) { - XSIMD_IF_CONSTEXPR(std::is_signed::value) + if constexpr(std::is_signed::value) { lo = _mm256_cvtepi8_epi16(x_lo); hi = _mm256_cvtepi8_epi16(x_hi); diff --git a/include/xsimd/arch/xsimd_avx2_128.hpp b/include/xsimd/arch/xsimd_avx2_128.hpp index e1068ccae..6f327ff09 100644 --- a/include/xsimd/arch/xsimd_avx2_128.hpp +++ b/include/xsimd/arch/xsimd_avx2_128.hpp @@ -48,7 +48,7 @@ namespace xsimd XSIMD_INLINE batch select(batch_bool_constant const&, batch const& true_br, batch const& false_br, requires_arch) noexcept { constexpr int mask = batch_bool_constant::mask(); - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm_blend_epi32(false_br, true_br, mask); } @@ -62,11 +62,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch bitwise_lshift(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm_sllv_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm_sllv_epi64(self, other); } @@ -82,7 +82,7 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm_srav_epi32(self, other); } @@ -93,11 +93,11 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm_srlv_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm_srlv_epi64(self, other); } @@ -117,7 +117,7 @@ namespace xsimd template XSIMD_INLINE __m128i maskload_avx2_128(T const* mem, __m128i mask) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm_maskload_epi32(reinterpret_cast(mem), mask); } @@ -130,7 +130,7 @@ namespace xsimd template XSIMD_INLINE void maskstore_avx2_128(T* mem, __m128i mask, __m128i src) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { _mm_maskstore_epi32(reinterpret_cast(mem), mask, src); } @@ -147,7 +147,7 @@ namespace xsimd typename = std::enable_if_t::value && (sizeof(T) == 4 || sizeof(T) == 8)>> XSIMD_INLINE batch load_masked(T const* mem, batch_bool_constant mask, convert, Mode, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(detail::lowers_to_plain_moves(mask)) + if constexpr(detail::lowers_to_plain_moves(mask)) { return detail::plain_move_load(mem, mask, convert {}, Mode {}); } @@ -161,7 +161,7 @@ namespace xsimd typename = std::enable_if_t::value && (sizeof(T) == 4 || sizeof(T) == 8)>> XSIMD_INLINE void store_masked(T* mem, batch const& src, batch_bool_constant mask, Mode, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(detail::lowers_to_plain_moves(mask)) + if constexpr(detail::lowers_to_plain_moves(mask)) { detail::plain_move_store(mem, src, mask, Mode {}); } diff --git a/include/xsimd/arch/xsimd_avx512bw.hpp b/include/xsimd/arch/xsimd_avx512bw.hpp index f6a78366c..266043a76 100644 --- a/include/xsimd/arch/xsimd_avx512bw.hpp +++ b/include/xsimd/arch/xsimd_avx512bw.hpp @@ -32,38 +32,38 @@ namespace xsimd using register_type = typename batch_bool::register_type; if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return (register_type)_mm512_cmp_epi8_mask(self, other, Cmp); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return (register_type)_mm512_cmp_epi16_mask(self, other, Cmp); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return (register_type)_mm512_cmp_epi32_mask(self, other, Cmp); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return (register_type)_mm512_cmp_epi64_mask(self, other, Cmp); } } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return (register_type)_mm512_cmp_epu8_mask(self, other, Cmp); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return (register_type)_mm512_cmp_epu16_mask(self, other, Cmp); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return (register_type)_mm512_cmp_epu32_mask(self, other, Cmp); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return (register_type)_mm512_cmp_epu64_mask(self, other, Cmp); } @@ -80,11 +80,11 @@ namespace xsimd return self; } - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm512_abs_epi8(self); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm512_abs_epi16(self); } @@ -98,11 +98,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch add(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm512_add_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm512_add_epi16(self, other); } @@ -116,11 +116,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch avgr(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm512_avg_epu8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm512_avg_epu16(self, other); } @@ -134,12 +134,12 @@ namespace xsimd template ::value>> XSIMD_INLINE batch avg(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { auto adj = ((self ^ other) << 7) >> 7; return avgr(self, other, A {}) - adj; } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { auto adj = ((self ^ other) << 15) >> 15; return avgr(self, other, A {}) - adj; @@ -155,11 +155,11 @@ namespace xsimd XSIMD_INLINE batch bitwise_lshift(batch const& self, int32_t other, requires_arch) noexcept { #if defined(XSIMD_AVX512_SHIFT_INTRINSICS_IMM_ONLY) - XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + if constexpr(sizeof(T) == 2) { return _mm512_sllv_epi16(self, _mm512_set1_epi16(other)); #else - XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + if constexpr(sizeof(T) == 2) { return _mm512_slli_epi16(self, other); #endif @@ -176,7 +176,7 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { __m512i sign_mask = _mm512_set1_epi16((0xFF00 >> other) & 0x00FF); __m512i zeros = _mm512_setzero_si512(); @@ -190,12 +190,12 @@ namespace xsimd return _mm512_or_si512(cmp_sign_mask, _mm512_andnot_si512(sign_mask, res)); #if defined(XSIMD_AVX512_SHIFT_INTRINSICS_IMM_ONLY) } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm512_srav_epi16(self, _mm512_set1_epi16(other)); #else } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm512_srai_epi16(self, other); #endif @@ -208,11 +208,11 @@ namespace xsimd else { #if defined(XSIMD_AVX512_SHIFT_INTRINSICS_IMM_ONLY) - XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + if constexpr(sizeof(T) == 2) { return _mm512_srlv_epi16(self, _mm512_set1_epi16(other)); #else - XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + if constexpr(sizeof(T) == 2) { return _mm512_srli_epi16(self, other); #endif @@ -229,11 +229,11 @@ namespace xsimd XSIMD_INLINE batch decr_if(batch const& self, batch_bool const& mask, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm512_mask_sub_epi8(self, mask.data, self, _mm512_set1_epi8(1)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm512_mask_sub_epi16(self, mask.data, self, _mm512_set1_epi16(1)); } @@ -269,11 +269,11 @@ namespace xsimd XSIMD_INLINE batch incr_if(batch const& self, batch_bool const& mask, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm512_mask_add_epi8(self, mask.data, self, _mm512_set1_epi8(1)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm512_mask_add_epi16(self, mask.data, self, _mm512_set1_epi16(1)); } @@ -287,11 +287,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch insert(batch const& self, T val, index pos, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm512_mask_set1_epi8(self, __mmask64(1ULL << (I & 63)), val); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm512_mask_set1_epi16(self, __mmask32(1 << (I & 31)), val); } @@ -320,22 +320,22 @@ namespace xsimd XSIMD_INLINE batch_bool load_unaligned(bool const* mem, batch_bool, requires_arch) noexcept { using mask_type = typename batch_bool::register_type; - XSIMD_IF_CONSTEXPR(batch_bool::size == 64) + if constexpr(batch_bool::size == 64) { __m512i bool_val = _mm512_loadu_si512((__m512i const*)mem); return (mask_type)_mm512_cmpgt_epu8_mask(bool_val, _mm512_setzero_si512()); } - else XSIMD_IF_CONSTEXPR(batch_bool::size == 32) + else if constexpr(batch_bool::size == 32) { __m256i bpack = _mm256_loadu_si256((__m256i const*)mem); return (mask_type)_mm512_cmpgt_epu16_mask(_mm512_cvtepu8_epi16(bpack), _mm512_setzero_si512()); } - else XSIMD_IF_CONSTEXPR(batch_bool::size == 16) + else if constexpr(batch_bool::size == 16) { __m128i bpack = _mm_loadu_si128((__m128i const*)mem); return (mask_type)_mm512_cmpgt_epu32_mask(_mm512_cvtepu8_epi32(bpack), _mm512_setzero_si512()); } - else XSIMD_IF_CONSTEXPR(batch_bool::size == 8) + else if constexpr(batch_bool::size == 8) { __m128i bpack = _mm_loadl_epi64((__m128i const*)mem); return (mask_type)_mm512_cmpgt_epu64_mask(_mm512_cvtepu8_epi64(bpack), _mm512_setzero_si512()); @@ -351,22 +351,22 @@ namespace xsimd XSIMD_INLINE batch_bool load_aligned(bool const* mem, batch_bool, requires_arch) noexcept { using mask_type = typename batch_bool::register_type; - XSIMD_IF_CONSTEXPR(batch_bool::size == 64) + if constexpr(batch_bool::size == 64) { __m512i bool_val = _mm512_load_si512((__m512i const*)mem); return (mask_type)_mm512_cmpgt_epu8_mask(bool_val, _mm512_setzero_si512()); } - else XSIMD_IF_CONSTEXPR(batch_bool::size == 32) + else if constexpr(batch_bool::size == 32) { __m256i bpack = _mm256_load_si256((__m256i const*)mem); return (mask_type)_mm512_cmpgt_epu16_mask(_mm512_cvtepu8_epi16(bpack), _mm512_setzero_si512()); } - else XSIMD_IF_CONSTEXPR(batch_bool::size == 16) + else if constexpr(batch_bool::size == 16) { __m128i bpack = _mm_load_si128((__m128i const*)mem); return (mask_type)_mm512_cmpgt_epu32_mask(_mm512_cvtepu8_epi32(bpack), _mm512_setzero_si512()); } - else XSIMD_IF_CONSTEXPR(batch_bool::size == 8) + else if constexpr(batch_bool::size == 8) { __m128i bpack = _mm_loadl_epi64((__m128i const*)mem); return (mask_type)_mm512_cmpgt_epu64_mask(_mm512_cvtepu8_epi64(bpack), _mm512_setzero_si512()); @@ -385,7 +385,7 @@ namespace xsimd class = std::enable_if_t::value && (sizeof(T) == 1 || sizeof(T) == 2)>> XSIMD_INLINE batch load_masked(T const* mem, batch_bool mask, convert, Mode, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm512_maskz_loadu_epi8((__mmask64)mask.mask(), mem); } @@ -399,7 +399,7 @@ namespace xsimd class = std::enable_if_t::value && (sizeof(T) == 1 || sizeof(T) == 2)>> XSIMD_INLINE void store_masked(T* mem, batch const& src, batch_bool mask, Mode, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { _mm512_mask_storeu_epi8((void*)mem, (__mmask64)mask.mask(), src); } @@ -431,11 +431,11 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm512_max_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm512_max_epi16(self, other); } @@ -446,11 +446,11 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm512_max_epu8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm512_max_epu16(self, other); } @@ -467,11 +467,11 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm512_min_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm512_min_epi16(self, other); } @@ -482,11 +482,11 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm512_min_epu8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm512_min_epu16(self, other); } @@ -501,13 +501,13 @@ namespace xsimd template ::value>> XSIMD_INLINE batch mul(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { __m512i upper = _mm512_and_si512(_mm512_mullo_epi16(self, other), _mm512_srli_epi16(_mm512_set1_epi16(-1), 8)); __m512i lower = _mm512_slli_epi16(_mm512_mullo_epi16(_mm512_srli_epi16(self, 8), _mm512_srli_epi16(other, 8)), 8); return _mm512_or_si512(upper, lower); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm512_mullo_epi16(self, other); } @@ -567,11 +567,11 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm512_adds_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm512_adds_epi16(self, other); } @@ -582,11 +582,11 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm512_adds_epu8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm512_adds_epu16(self, other); } @@ -601,11 +601,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch select(batch_bool const& cond, batch const& true_br, batch const& false_br, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm512_mask_blend_epi8(cond, false_br.data, true_br.data); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm512_mask_blend_epi16(cond, false_br.data, true_br.data); } @@ -643,11 +643,11 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm512_subs_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm512_subs_epi16(self, other); } @@ -658,11 +658,11 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm512_subs_epu8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm512_subs_epu16(self, other); } @@ -687,11 +687,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch sub(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm512_sub_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm512_sub_epi16(self, other); } @@ -752,12 +752,12 @@ namespace xsimd XSIMD_INLINE batch zip_hi(batch const& self, batch const& other, requires_arch) noexcept { __m512i lo, hi; - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { lo = _mm512_unpacklo_epi8(self, other); hi = _mm512_unpackhi_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { lo = _mm512_unpacklo_epi16(self, other); hi = _mm512_unpackhi_epi16(self, other); @@ -780,12 +780,12 @@ namespace xsimd XSIMD_INLINE batch zip_lo(batch const& self, batch const& other, requires_arch) noexcept { __m512i lo, hi; - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { lo = _mm512_unpacklo_epi8(self, other); hi = _mm512_unpackhi_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { lo = _mm512_unpacklo_epi16(self, other); hi = _mm512_unpackhi_epi16(self, other); diff --git a/include/xsimd/arch/xsimd_avx512dq.hpp b/include/xsimd/arch/xsimd_avx512dq.hpp index 0bedb9b41..fdcd7311d 100644 --- a/include/xsimd/arch/xsimd_avx512dq.hpp +++ b/include/xsimd/arch/xsimd_avx512dq.hpp @@ -25,7 +25,7 @@ namespace xsimd template XSIMD_INLINE batch load_masked(int32_t const* mem, batch_bool_constant mask, convert, Mode, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(mask.countr_zero() >= 8) + if constexpr(mask.countr_zero() >= 8) { constexpr auto mhi = ::xsimd::detail::upper_half(mask); const auto hi = load_masked(mem + 8, mhi, convert {}, Mode {}, avx2 {}); @@ -37,7 +37,7 @@ namespace xsimd template XSIMD_INLINE batch load_masked(float const* mem, batch_bool_constant mask, convert, Mode, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(mask.countr_zero() >= 8) + if constexpr(mask.countr_zero() >= 8) { constexpr auto mhi = ::xsimd::detail::upper_half(mask); const auto hi = load_masked(mem + 8, mhi, convert {}, Mode {}, avx2 {}); @@ -233,7 +233,7 @@ namespace xsimd constexpr bool dup_lo = detail::is_dup_lo(mask); constexpr bool dup_hi = detail::is_dup_hi(mask); - XSIMD_IF_CONSTEXPR(dup_lo || dup_hi) + if constexpr(dup_lo || dup_hi) { const batch half = _mm512_extractf32x8_ps(self, dup_lo ? 0 : 1); constexpr std::conditional_t, diff --git a/include/xsimd/arch/xsimd_avx512f.hpp b/include/xsimd/arch/xsimd_avx512f.hpp index b8a56c7ba..f8ef4a495 100644 --- a/include/xsimd/arch/xsimd_avx512f.hpp +++ b/include/xsimd/arch/xsimd_avx512f.hpp @@ -156,7 +156,7 @@ namespace xsimd using register_type = typename batch_bool::register_type; if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { // shifting to take sign into account uint64_t mask_low0 = _mm512_cmp_epi32_mask((batch(self.data) & batch(0x000000FF)) << 24, @@ -181,7 +181,7 @@ namespace xsimd } return (register_type)mask; } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { // shifting to take sign into account uint16_t mask_low = _mm512_cmp_epi32_mask((batch(self.data) & batch(0x0000FFFF)) << 16, @@ -192,18 +192,18 @@ namespace xsimd Cmp); return static_cast(morton(mask_low, mask_high)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return (register_type)_mm512_cmp_epi32_mask(self, other, Cmp); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return (register_type)_mm512_cmp_epi64_mask(self, other, Cmp); } } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { uint64_t mask_low0 = _mm512_cmp_epu32_mask((batch(self.data) & batch(0x000000FF)), (batch(other.data) & batch(0x000000FF)), Cmp); uint64_t mask_low1 = _mm512_cmp_epu32_mask((batch(self.data) & batch(0x0000FF00)), (batch(other.data) & batch(0x0000FF00)), Cmp); @@ -219,17 +219,17 @@ namespace xsimd } return (register_type)mask; } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { uint16_t mask_low = _mm512_cmp_epu32_mask((batch(self.data) & batch(0x0000FFFF)), (batch(other.data) & batch(0x0000FFFF)), Cmp); uint16_t mask_high = _mm512_cmp_epu32_mask((batch(self.data) & batch(0xFFFF0000)), (batch(other.data) & batch(0xFFFF0000)), Cmp); return static_cast(morton(mask_low, mask_high)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return (register_type)_mm512_cmp_epu32_mask(self, other, Cmp); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return (register_type)_mm512_cmp_epu64_mask(self, other, Cmp); } @@ -306,13 +306,13 @@ namespace xsimd { constexpr auto half = batch::size / 2; using half_arch = typename ::xsimd::make_sized_batch_t::arch_type; - XSIMD_IF_CONSTEXPR(mask.countl_zero() >= half) // lower 256-bit half + if constexpr(mask.countl_zero() >= half) // lower 256-bit half { constexpr auto mlo = ::xsimd::detail::lower_half(mask); const auto lo = load_masked(mem, mlo, convert {}, Mode {}, half_arch {}); return detail::load_masked(lo); // zero-extend low half } - else XSIMD_IF_CONSTEXPR(mask.countr_zero() >= half) // upper 256-bit half + else if constexpr(mask.countr_zero() >= half) // upper 256-bit half { constexpr auto mhi = ::xsimd::detail::upper_half(mask); const auto hi = load_masked(mem + half, mhi, convert {}, Mode {}, half_arch {}); @@ -335,13 +335,13 @@ namespace xsimd constexpr auto half = batch::size / 2; using half_batch = ::xsimd::make_sized_batch_t; using half_arch = typename half_batch::arch_type; - XSIMD_IF_CONSTEXPR(mask.countl_zero() >= half) // lower 256-bit half + if constexpr(mask.countl_zero() >= half) // lower 256-bit half { constexpr auto mlo = ::xsimd::detail::lower_half(mask); const half_batch lo = detail::lower_half(src); store_masked(mem, lo, mlo, Mode {}, half_arch {}); } - else XSIMD_IF_CONSTEXPR(mask.countr_zero() >= half) // upper 256-bit half + else if constexpr(mask.countr_zero() >= half) // upper 256-bit half { constexpr auto mhi = ::xsimd::detail::upper_half(mask); const half_batch hi = detail::upper_half(src); @@ -398,23 +398,23 @@ namespace xsimd return self; } - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return detail::fwd_to_avx([](__m256i s) noexcept { return abs(batch(s)); }, self); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return detail::fwd_to_avx([](__m256i s) noexcept { return abs(batch(s)); }, self); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm512_abs_epi32(self); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm512_abs_epi64(self); } @@ -429,23 +429,23 @@ namespace xsimd template ::value>> XSIMD_INLINE batch add(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return detail::fwd_to_avx([](__m256i s, __m256i o) noexcept { return add(batch(s), batch(o)); }, self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return detail::fwd_to_avx([](__m256i s, __m256i o) noexcept { return add(batch(s), batch(o)); }, self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm512_add_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm512_add_epi64(self, other); } @@ -547,7 +547,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch bitwise_lshift(batch const& self, int32_t other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { #if defined(XSIMD_AVX512_SHIFT_INTRINSICS_IMM_ONLY) __m512i tmp = _mm512_sllv_epi32(self, _mm512_set1_epi32(other)); @@ -556,27 +556,27 @@ namespace xsimd #endif return _mm512_and_si512(_mm512_set1_epi8(0xFF << other), tmp); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return detail::fwd_to_avx([](__m256i s, int32_t o) noexcept { return bitwise_lshift(batch(s), o, avx2 {}); }, self, other); #if defined(XSIMD_AVX512_SHIFT_INTRINSICS_IMM_ONLY) } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm512_sllv_epi32(self, _mm512_set1_epi32(other)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm512_sllv_epi64(self, _mm512_set1_epi64(other)); #else } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm512_slli_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm512_slli_epi64(self, other); #endif @@ -644,19 +644,19 @@ namespace xsimd if (std::is_signed::value) { #if defined(XSIMD_AVX512_SHIFT_INTRINSICS_IMM_ONLY) - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm512_srav_epi32(self, _mm512_set1_epi32(other)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm512_srav_epi64(self, _mm512_set1_epi64(other)); #else - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm512_srai_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm512_srai_epi64(self, other); #endif @@ -670,7 +670,7 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { #if defined(XSIMD_AVX512_SHIFT_INTRINSICS_IMM_ONLY) __m512i tmp = _mm512_srlv_epi32(self, _mm512_set1_epi32(other)); @@ -680,20 +680,20 @@ namespace xsimd return _mm512_and_si512(_mm512_set1_epi8(0xFF >> other), tmp); #if defined(XSIMD_AVX512_SHIFT_INTRINSICS_IMM_ONLY) } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm512_srlv_epi32(self, _mm512_set1_epi32(other)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm512_srlv_epi64(self, _mm512_set1_epi64(other)); #else } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm512_srli_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm512_srli_epi64(self, other); #endif @@ -711,11 +711,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch rotl(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm512_rolv_epi32(self, other); } - XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + if constexpr(sizeof(T) == 8) { return _mm512_rolv_epi64(self, other); } @@ -733,11 +733,11 @@ namespace xsimd { constexpr auto bits = std::numeric_limits::digits + std::numeric_limits::is_signed; static_assert(count < bits, "Count must be less than the number of bits in T"); - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm512_rol_epi32(self, count); } - XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + if constexpr(sizeof(T) == 8) { return _mm512_rol_epi64(self, count); } @@ -751,19 +751,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch rotr(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) < 4) + if constexpr(sizeof(T) < 4) { return detail::fwd_to_avx([](__m256i s, __m256i o) noexcept { return rotr(batch(s), batch(o), avx2 {}); }, self, other); } - XSIMD_IF_CONSTEXPR(std::is_unsigned::value) + if constexpr(std::is_unsigned::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm512_rorv_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm512_rorv_epi64(self, other); } @@ -781,19 +781,19 @@ namespace xsimd { constexpr auto bits = std::numeric_limits::digits + std::numeric_limits::is_signed; static_assert(count < bits, "Count must be less than the number of bits in T"); - XSIMD_IF_CONSTEXPR(sizeof(T) < 4) + if constexpr(sizeof(T) < 4) { return detail::fwd_to_avx([](__m256i s) noexcept { return rotr(batch(s), avx2 {}); }, self); } - XSIMD_IF_CONSTEXPR(std::is_unsigned::value) + if constexpr(std::is_unsigned::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm512_ror_epi32(self, count); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm512_ror_epi64(self, count); } @@ -867,19 +867,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch broadcast(T val, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm512_set1_epi8(val); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm512_set1_epi16(val); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm512_set1_epi32(val); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm512_set1_epi64(val); } @@ -1007,11 +1007,11 @@ namespace xsimd XSIMD_INLINE batch decr_if(batch const& self, batch_bool const& mask, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm512_mask_sub_epi32(self, mask.data, self, _mm512_set1_epi32(1)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm512_mask_sub_epi64(self, mask.data, self, _mm512_set1_epi64(1)); } @@ -1353,11 +1353,11 @@ namespace xsimd XSIMD_INLINE batch incr_if(batch const& self, batch_bool const& mask, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm512_mask_add_epi32(self, mask.data, self, _mm512_set1_epi32(1)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm512_mask_add_epi64(self, mask.data, self, _mm512_set1_epi64(1)); } @@ -1383,19 +1383,19 @@ namespace xsimd template ::value>> XSIMD_INLINE T first(batch const& self, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return static_cast(_mm_cvtsi128_si32(_mm512_castsi512_si128(self)) & 0xFF); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return static_cast(_mm_cvtsi128_si32(_mm512_castsi512_si128(self)) & 0xFFFF); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return static_cast(_mm_cvtsi128_si32(_mm512_castsi512_si128(self))); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { batch low = _mm512_castsi512_si128(self); return first(low, sse4_2 {}); @@ -1411,7 +1411,7 @@ namespace xsimd template XSIMD_INLINE float get(batch const& self, ::xsimd::index, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(I == 0) + if constexpr(I == 0) { return first(self, avx512f {}); } @@ -1422,7 +1422,7 @@ namespace xsimd template XSIMD_INLINE double get(batch const& self, ::xsimd::index, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(I == 0) + if constexpr(I == 0) { return first(self, avx512f {}); } @@ -1433,16 +1433,16 @@ namespace xsimd template ::value>> XSIMD_INLINE T get(batch const& self, ::xsimd::index, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(I == 0) + if constexpr(I == 0) { return first(self, avx512f {}); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { const auto rotated = _mm512_alignr_epi32(self, self, I); return first(batch(_mm512_castsi512_si128(rotated)), sse4_2 {}); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { const auto rotated = _mm512_alignr_epi64(self, self, I); return first(batch(_mm512_castsi512_si128(rotated)), sse4_2 {}); @@ -1476,11 +1476,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch insert(batch const& self, T val, index pos, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm512_mask_set1_epi32(self, __mmask16(1 << (I & 15)), val); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm512_mask_set1_epi64(self, __mmask8(1 << (I & 7)), val); } @@ -1543,7 +1543,7 @@ namespace xsimd XSIMD_INLINE unsigned char tobitset(unsigned char unpacked[N]) { static_assert(N == 8 || N == 4 || N == 2, "valid pack size"); - XSIMD_IF_CONSTEXPR(N == 8) + if constexpr(N == 8) { uint64_t data; memcpy(&data, unpacked, sizeof(uint64_t)); @@ -1553,7 +1553,7 @@ namespace xsimd unsigned char res = ((data * magic) >> 56) & 0xFF; return res; } - else XSIMD_IF_CONSTEXPR(N == 4) + else if constexpr(N == 4) { uint32_t data; memcpy(&data, unpacked, sizeof(uint32_t)); @@ -1563,7 +1563,7 @@ namespace xsimd unsigned char res = ((data * magic) >> 24) & 0xFF; return res; } - else XSIMD_IF_CONSTEXPR(N == 2) + else if constexpr(N == 2) { uint16_t data; memcpy(&data, unpacked, sizeof(uint16_t)); @@ -1708,11 +1708,11 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm512_max_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm512_max_epi64(self, other); } @@ -1725,11 +1725,11 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm512_max_epu32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm512_max_epu64(self, other); } @@ -1758,11 +1758,11 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm512_min_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm512_min_epi64(self, other); } @@ -1775,11 +1775,11 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm512_min_epu32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm512_min_epu64(self, other); } @@ -1806,7 +1806,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch mul(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm512_mullo_epi32(self, other); } @@ -1986,11 +1986,11 @@ namespace xsimd template ::value>> XSIMD_INLINE T reduce_mul(batch const& self, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm512_reduce_mul_epi32(self); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm512_reduce_mul_epi64(self); } @@ -2083,7 +2083,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch select(batch_bool const& cond, batch const& true_br, batch const& false_br, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { alignas(avx2::alignment()) uint8_t buffer[64]; // FIXME: ultra inefficient @@ -2099,7 +2099,7 @@ namespace xsimd __m256i res_hi = select(batch_bool(cond_hi), batch(true_hi), batch(false_hi), avx2 {}); return detail::merge_avx(res_low, res_hi); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { __m256i cond_low = _mm512_maskz_cvtepi32_epi16((uint64_t)cond.data & 0xFFFF, _mm512_set1_epi32(~0)); __m256i cond_hi = _mm512_maskz_cvtepi32_epi16((uint64_t)cond.data >> 16, _mm512_set1_epi32(~0)); @@ -2111,11 +2111,11 @@ namespace xsimd __m256i res_hi = select(batch_bool(cond_hi), batch(true_hi), batch(false_hi), avx2 {}); return detail::merge_avx(res_low, res_hi); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm512_mask_blend_epi32(cond, false_br, true_br); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm512_mask_blend_epi64(cond, false_br, true_br); } @@ -2505,23 +2505,23 @@ namespace xsimd template ::value>> XSIMD_INLINE batch sub(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return detail::fwd_to_avx([](__m256i s, __m256i o) noexcept { return sub(batch(s), batch(o)); }, self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return detail::fwd_to_avx([](__m256i s, __m256i o) noexcept { return sub(batch(s), batch(o)); }, self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm512_sub_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm512_sub_epi64(self, other); } @@ -2585,17 +2585,17 @@ namespace xsimd batch_constant mask, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(detail::is_identity(mask)) + if constexpr(detail::is_identity(mask)) { return self; } - XSIMD_IF_CONSTEXPR(!detail::is_cross_lane(mask)) + if constexpr(!detail::is_cross_lane(mask)) { constexpr int imm0 = detail::mod_shuffle(V0, V1, V2, V3); constexpr int imm1 = detail::mod_shuffle(V4, V5, V6, V7); constexpr int imm2 = detail::mod_shuffle(V8, V9, V10, V11); constexpr int imm3 = detail::mod_shuffle(V12, V13, V14, V15); - XSIMD_IF_CONSTEXPR(imm0 == imm1 && imm0 == imm2 && imm0 == imm3) + if constexpr(imm0 == imm1 && imm0 == imm2 && imm0 == imm3) { return _mm512_permute_ps(self, imm0); } @@ -2607,18 +2607,18 @@ namespace xsimd batch_constant mask, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(detail::is_identity(mask)) + if constexpr(detail::is_identity(mask)) { return self; } - XSIMD_IF_CONSTEXPR(!detail::is_cross_lane(mask)) + if constexpr(!detail::is_cross_lane(mask)) { constexpr auto imm = ((V0 & 1) << 0) | ((V1 & 1) << 1) | ((V2 & 1) << 2) | ((V3 & 1) << 3) | ((V4 & 1) << 4) | ((V5 & 1) << 5) | ((V6 & 1) << 6) | ((V7 & 1) << 7); return _mm512_permute_pd(self, imm); } constexpr bool dup_lo = detail::is_dup_lo(mask); constexpr bool dup_hi = detail::is_dup_hi(mask); - XSIMD_IF_CONSTEXPR(dup_lo || dup_hi) + if constexpr(dup_lo || dup_hi) { const batch half = _mm512_extractf64x4_pd(self, dup_lo ? 0 : 1); constexpr std::conditional_t, @@ -2700,12 +2700,12 @@ namespace xsimd template XSIMD_INLINE batch swizzle(batch const& self, batch_constant mask, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(detail::is_pair_of_contiguous_indices::value) + if constexpr(detail::is_pair_of_contiguous_indices::value) { constexpr typename detail::fold_batch_constant::type mask32; return _mm512_permutexvar_epi32(static_cast>(mask32), self); } - else XSIMD_IF_CONSTEXPR(detail::is_reduce_pattern()) + else if constexpr(detail::is_reduce_pattern()) { // FIXME: this sequence is very inefficient, but it's here to catch // a pattern generated by detail::reduce from xsimd_common_math.hpp. @@ -2901,23 +2901,23 @@ namespace xsimd XSIMD_INLINE batch zip_hi(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { assert(false && "not implemented yet"); return {}; } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { assert(false && "not implemented yet"); return {}; } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { __m512i idx = _mm512_setr_epi32(8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31); return _mm512_permutex2var_epi32(self, idx, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { __m512i idx = _mm512_setr_epi64(4, 12, 5, 13, 6, 14, 7, 15); return _mm512_permutex2var_epi64(self, idx, other); @@ -2950,23 +2950,23 @@ namespace xsimd XSIMD_INLINE batch zip_lo(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { assert(false && "not implemented yet"); return {}; } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { assert(false && "not implemented yet"); return {}; } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { __m512i idx = _mm512_setr_epi32(0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23); return _mm512_permutex2var_epi32(self, idx, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { __m512i idx = _mm512_setr_epi64(0, 8, 1, 9, 2, 10, 3, 11); return _mm512_permutex2var_epi64(self, idx, other); @@ -3000,9 +3000,9 @@ namespace xsimd __m256i x_lo = detail::lower_half(x); __m256i x_hi = detail::upper_half(x); __m512i lo, hi; - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { - XSIMD_IF_CONSTEXPR(std::is_signed::value) + if constexpr(std::is_signed::value) { lo = _mm512_cvtepi32_epi64(x_lo); hi = _mm512_cvtepi32_epi64(x_hi); @@ -3013,9 +3013,9 @@ namespace xsimd hi = _mm512_cvtepu32_epi64(x_hi); } } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { - XSIMD_IF_CONSTEXPR(std::is_signed::value) + if constexpr(std::is_signed::value) { lo = _mm512_cvtepi16_epi32(x_lo); hi = _mm512_cvtepi16_epi32(x_hi); @@ -3026,7 +3026,7 @@ namespace xsimd hi = _mm512_cvtepu16_epi32(x_hi); } } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + else if constexpr(sizeof(T) == 1) { auto pair_lo = widen(batch(x_lo), avx2 {}); auto pair_hi = widen(batch(x_hi), avx2 {}); diff --git a/include/xsimd/arch/xsimd_avx512vbmi2.hpp b/include/xsimd/arch/xsimd_avx512vbmi2.hpp index 705b8beaf..887e7324f 100644 --- a/include/xsimd/arch/xsimd_avx512vbmi2.hpp +++ b/include/xsimd/arch/xsimd_avx512vbmi2.hpp @@ -71,7 +71,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch rotl(batch const& self, int32_t other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + if constexpr(sizeof(T) == 2) { return _mm512_shldv_epi16(self, self, _mm512_set1_epi16(static_cast(other))); } @@ -86,7 +86,7 @@ namespace xsimd { constexpr auto bits = std::numeric_limits::digits + std::numeric_limits::is_signed; static_assert(count < bits, "Count must be less than the number of bits in T"); - XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + if constexpr(sizeof(T) == 2) { return _mm512_shldi_epi16(self, self, count); } @@ -100,7 +100,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch rotr(batch const& self, int32_t other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + if constexpr(sizeof(T) == 2) { return _mm512_shrdv_epi16(self, self, _mm512_set1_epi16(static_cast(other))); } @@ -115,7 +115,7 @@ namespace xsimd { constexpr auto bits = std::numeric_limits::digits + std::numeric_limits::is_signed; static_assert(count < bits, "count must be less than the number of bits in T"); - XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + if constexpr(sizeof(T) == 2) { return _mm512_shrdi_epi16(self, self, count); } diff --git a/include/xsimd/arch/xsimd_avx512vl_128.hpp b/include/xsimd/arch/xsimd_avx512vl_128.hpp index 2df3c45fa..3a604c88f 100644 --- a/include/xsimd/arch/xsimd_avx512vl_128.hpp +++ b/include/xsimd/arch/xsimd_avx512vl_128.hpp @@ -40,7 +40,7 @@ namespace xsimd using register_type = typename batch_bool::register_type; if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { // shifting to take sign into account uint64_t mask_low0 = _mm_cmp_epi32_mask((batch(self.data) & batch(0x000000FF)) << 24, @@ -65,7 +65,7 @@ namespace xsimd } return (register_type)mask; } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { // shifting to take sign into account uint16_t mask_low = _mm_cmp_epi32_mask((batch(self.data) & batch(0x0000FFFF)) << 16, @@ -76,18 +76,18 @@ namespace xsimd Cmp); return static_cast(morton(mask_low, mask_high)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return (register_type)_mm_cmp_epi32_mask(self, other, Cmp); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return (register_type)_mm_cmp_epi64_mask(self, other, Cmp); } } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { uint64_t mask_low0 = _mm_cmp_epu32_mask((batch(self.data) & batch(0x000000FF)), (batch(other.data) & batch(0x000000FF)), Cmp); uint64_t mask_low1 = _mm_cmp_epu32_mask((batch(self.data) & batch(0x0000FF00)), (batch(other.data) & batch(0x0000FF00)), Cmp); @@ -103,17 +103,17 @@ namespace xsimd } return (register_type)mask; } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { uint16_t mask_low = _mm_cmp_epu32_mask((batch(self.data) & batch(0x0000FFFF)), (batch(other.data) & batch(0x0000FFFF)), Cmp); uint16_t mask_high = _mm_cmp_epu32_mask((batch(self.data) & batch(0xFFFF0000)), (batch(other.data) & batch(0xFFFF0000)), Cmp); return static_cast(morton(mask_low, mask_high)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return (register_type)_mm_cmp_epu32_mask(self, other, Cmp); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return (register_type)_mm_cmp_epu64_mask(self, other, Cmp); } @@ -211,7 +211,7 @@ namespace xsimd template = 0> XSIMD_INLINE __m128i maskload128(T const* mem, uint64_t m, Mode) noexcept { - XSIMD_IF_CONSTEXPR(std::is_same::value) + if constexpr(std::is_same::value) { return _mm_maskz_load_epi32((__mmask8)m, mem); } @@ -223,7 +223,7 @@ namespace xsimd template = 0> XSIMD_INLINE __m128i maskload128(T const* mem, uint64_t m, Mode) noexcept { - XSIMD_IF_CONSTEXPR(std::is_same::value) + if constexpr(std::is_same::value) { return _mm_maskz_load_epi64((__mmask8)m, mem); } @@ -235,7 +235,7 @@ namespace xsimd template XSIMD_INLINE __m128 maskload128(float const* mem, uint64_t m, Mode) noexcept { - XSIMD_IF_CONSTEXPR(std::is_same::value) + if constexpr(std::is_same::value) { return _mm_maskz_load_ps((__mmask8)m, mem); } @@ -247,7 +247,7 @@ namespace xsimd template XSIMD_INLINE __m128d maskload128(double const* mem, uint64_t m, Mode) noexcept { - XSIMD_IF_CONSTEXPR(std::is_same::value) + if constexpr(std::is_same::value) { return _mm_maskz_load_pd((__mmask8)m, mem); } @@ -260,7 +260,7 @@ namespace xsimd template = 0> XSIMD_INLINE void maskstore128(T* mem, __m128i src, uint64_t m, Mode) noexcept { - XSIMD_IF_CONSTEXPR(std::is_same::value) + if constexpr(std::is_same::value) { _mm_mask_store_epi32(mem, (__mmask8)m, src); } @@ -272,7 +272,7 @@ namespace xsimd template = 0> XSIMD_INLINE void maskstore128(T* mem, __m128i src, uint64_t m, Mode) noexcept { - XSIMD_IF_CONSTEXPR(std::is_same::value) + if constexpr(std::is_same::value) { _mm_mask_store_epi64(mem, (__mmask8)m, src); } @@ -284,7 +284,7 @@ namespace xsimd template XSIMD_INLINE void maskstore128(float* mem, __m128 src, uint64_t m, Mode) noexcept { - XSIMD_IF_CONSTEXPR(std::is_same::value) + if constexpr(std::is_same::value) { _mm_mask_store_ps(mem, (__mmask8)m, src); } @@ -296,7 +296,7 @@ namespace xsimd template XSIMD_INLINE void maskstore128(double* mem, __m128d src, uint64_t m, Mode) noexcept { - XSIMD_IF_CONSTEXPR(std::is_same::value) + if constexpr(std::is_same::value) { _mm_mask_store_pd(mem, (__mmask8)m, src); } @@ -313,7 +313,7 @@ namespace xsimd typename> XSIMD_INLINE batch load_masked(T const* mem, batch_bool_constant mask, convert, Mode, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(detail::lowers_to_plain_moves(mask)) + if constexpr(detail::lowers_to_plain_moves(mask)) { return detail::plain_move_load(mem, mask, convert {}, Mode {}); } @@ -334,7 +334,7 @@ namespace xsimd typename> XSIMD_INLINE void store_masked(T* mem, batch const& src, batch_bool_constant mask, Mode, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(detail::lowers_to_plain_moves(mask)) + if constexpr(detail::lowers_to_plain_moves(mask)) { detail::plain_move_store(mem, src, mask, Mode {}); } @@ -460,11 +460,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch insert(batch const& self, T val, index pos, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm_mask_set1_epi32(self, __mmask8(1 << (I & 7)), val); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm_mask_set1_epi64(self, __mmask8(1 << (I & 3)), val); } @@ -492,7 +492,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch bitwise_rshift(batch const& self, int32_t other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(std::is_signed::value && sizeof(T) == 8) + if constexpr(std::is_signed::value && sizeof(T) == 8) { return _mm_srai_epi64(self, other); } @@ -506,7 +506,7 @@ namespace xsimd { constexpr auto bits = std::numeric_limits::digits + std::numeric_limits::is_signed; static_assert(shift < bits, "Shift amount must be less than the number of bits in T"); - XSIMD_IF_CONSTEXPR(std::is_signed::value && sizeof(T) == 8) + if constexpr(std::is_signed::value && sizeof(T) == 8) { return _mm_srai_epi64(self, shift); } @@ -518,7 +518,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch bitwise_rshift(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(std::is_signed::value && sizeof(T) == 8) + if constexpr(std::is_signed::value && sizeof(T) == 8) { return _mm_srav_epi64(self, other); } @@ -532,11 +532,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch rotl(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm_rolv_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm_rolv_epi64(self, other); } @@ -555,11 +555,11 @@ namespace xsimd { constexpr auto bits = std::numeric_limits::digits + std::numeric_limits::is_signed; static_assert(count < bits, "Count must be less than the number of bits in T"); - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm_rol_epi32(self, count); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm_rol_epi64(self, count); } @@ -573,11 +573,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch rotr(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm_rorv_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm_rorv_epi64(self, other); } @@ -597,11 +597,11 @@ namespace xsimd { constexpr auto bits = std::numeric_limits::digits + std::numeric_limits::is_signed; static_assert(count < bits, "Count must be less than the number of bits in T"); - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm_ror_epi32(self, count); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm_ror_epi64(self, count); } @@ -827,21 +827,21 @@ namespace xsimd template ::value>> XSIMD_INLINE batch select(batch_bool const& cond, batch const& true_br, batch const& false_br, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { batch_bool batch_cond = batch_bool::from_mask(cond.mask()); return _mm_blendv_epi8(false_br, true_br, batch_cond); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { batch_bool batch_cond = batch_bool::from_mask(cond.mask()); return _mm_blendv_epi8(false_br, true_br, batch_cond); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm_mask_blend_epi32(cond, false_br, true_br); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm_mask_blend_epi64(cond, false_br, true_br); } diff --git a/include/xsimd/arch/xsimd_avx512vl_256.hpp b/include/xsimd/arch/xsimd_avx512vl_256.hpp index 791d3f0bd..cb37650c0 100644 --- a/include/xsimd/arch/xsimd_avx512vl_256.hpp +++ b/include/xsimd/arch/xsimd_avx512vl_256.hpp @@ -40,7 +40,7 @@ namespace xsimd using register_type = typename batch_bool::register_type; if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { // shifting to take sign into account uint64_t mask_low0 = _mm256_cmp_epi32_mask((batch(self.data) & batch(0x000000FF)) << 24, @@ -65,7 +65,7 @@ namespace xsimd } return (register_type)mask; } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { // shifting to take sign into account uint16_t mask_low = _mm256_cmp_epi32_mask((batch(self.data) & batch(0x0000FFFF)) << 16, @@ -76,18 +76,18 @@ namespace xsimd Cmp); return static_cast(morton(mask_low, mask_high)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return (register_type)_mm256_cmp_epi32_mask(self, other, Cmp); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return (register_type)_mm256_cmp_epi64_mask(self, other, Cmp); } } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { uint64_t mask_low0 = _mm256_cmp_epu32_mask((batch(self.data) & batch(0x000000FF)), (batch(other.data) & batch(0x000000FF)), Cmp); uint64_t mask_low1 = _mm256_cmp_epu32_mask((batch(self.data) & batch(0x0000FF00)), (batch(other.data) & batch(0x0000FF00)), Cmp); @@ -103,17 +103,17 @@ namespace xsimd } return (register_type)mask; } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { uint16_t mask_low = _mm256_cmp_epu32_mask((batch(self.data) & batch(0x0000FFFF)), (batch(other.data) & batch(0x0000FFFF)), Cmp); uint16_t mask_high = _mm256_cmp_epu32_mask((batch(self.data) & batch(0xFFFF0000)), (batch(other.data) & batch(0xFFFF0000)), Cmp); return static_cast(morton(mask_low, mask_high)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return (register_type)_mm256_cmp_epu32_mask(self, other, Cmp); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return (register_type)_mm256_cmp_epu64_mask(self, other, Cmp); } @@ -210,7 +210,7 @@ namespace xsimd template = 0> XSIMD_INLINE __m256i maskload256(T const* mem, uint64_t m, Mode) noexcept { - XSIMD_IF_CONSTEXPR(std::is_same::value) + if constexpr(std::is_same::value) { return _mm256_maskz_load_epi32((__mmask8)m, mem); } @@ -222,7 +222,7 @@ namespace xsimd template = 0> XSIMD_INLINE __m256i maskload256(T const* mem, uint64_t m, Mode) noexcept { - XSIMD_IF_CONSTEXPR(std::is_same::value) + if constexpr(std::is_same::value) { return _mm256_maskz_load_epi64((__mmask8)m, mem); } @@ -234,7 +234,7 @@ namespace xsimd template XSIMD_INLINE __m256 maskload256(float const* mem, uint64_t m, Mode) noexcept { - XSIMD_IF_CONSTEXPR(std::is_same::value) + if constexpr(std::is_same::value) { return _mm256_maskz_load_ps((__mmask8)m, mem); } @@ -246,7 +246,7 @@ namespace xsimd template XSIMD_INLINE __m256d maskload256(double const* mem, uint64_t m, Mode) noexcept { - XSIMD_IF_CONSTEXPR(std::is_same::value) + if constexpr(std::is_same::value) { return _mm256_maskz_load_pd((__mmask8)m, mem); } @@ -259,7 +259,7 @@ namespace xsimd template = 0> XSIMD_INLINE void maskstore256(T* mem, __m256i src, uint64_t m, Mode) noexcept { - XSIMD_IF_CONSTEXPR(std::is_same::value) + if constexpr(std::is_same::value) { _mm256_mask_store_epi32(mem, (__mmask8)m, src); } @@ -271,7 +271,7 @@ namespace xsimd template = 0> XSIMD_INLINE void maskstore256(T* mem, __m256i src, uint64_t m, Mode) noexcept { - XSIMD_IF_CONSTEXPR(std::is_same::value) + if constexpr(std::is_same::value) { _mm256_mask_store_epi64(mem, (__mmask8)m, src); } @@ -283,7 +283,7 @@ namespace xsimd template XSIMD_INLINE void maskstore256(float* mem, __m256 src, uint64_t m, Mode) noexcept { - XSIMD_IF_CONSTEXPR(std::is_same::value) + if constexpr(std::is_same::value) { _mm256_mask_store_ps(mem, (__mmask8)m, src); } @@ -295,7 +295,7 @@ namespace xsimd template XSIMD_INLINE void maskstore256(double* mem, __m256d src, uint64_t m, Mode) noexcept { - XSIMD_IF_CONSTEXPR(std::is_same::value) + if constexpr(std::is_same::value) { _mm256_mask_store_pd(mem, (__mmask8)m, src); } @@ -313,11 +313,11 @@ namespace xsimd XSIMD_INLINE batch load_masked(T const* mem, batch_bool_constant mask, convert, Mode, requires_arch) noexcept { // all() reaches here only via the avx512f half-split cascade. - XSIMD_IF_CONSTEXPR(mask.all()) + if constexpr(mask.all()) { return batch::load(mem, Mode {}); } - else XSIMD_IF_CONSTEXPR(detail::lowers_to_plain_moves(mask)) + else if constexpr(detail::lowers_to_plain_moves(mask)) { return detail::plain_move_load(mem, mask, convert {}, Mode {}); } @@ -338,11 +338,11 @@ namespace xsimd typename = std::enable_if_t::value && (sizeof(T) == 4 || sizeof(T) == 8)>> XSIMD_INLINE void store_masked(T* mem, batch const& src, batch_bool_constant mask, Mode, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(mask.all()) + if constexpr(mask.all()) { src.store(mem, Mode {}); } - else XSIMD_IF_CONSTEXPR(detail::lowers_to_plain_moves(mask)) + else if constexpr(detail::lowers_to_plain_moves(mask)) { detail::plain_move_store(mem, src, mask, Mode {}); } @@ -559,11 +559,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch insert(batch const& self, T val, index pos, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm256_mask_set1_epi32(self, __mmask8(1 << (I & 7)), val); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm256_mask_set1_epi64(self, __mmask8(1 << (I & 3)), val); } @@ -591,7 +591,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch bitwise_rshift(batch const& self, int32_t other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(std::is_signed::value && sizeof(T) == 8) + if constexpr(std::is_signed::value && sizeof(T) == 8) { return _mm256_srai_epi64(self, other); } @@ -605,7 +605,7 @@ namespace xsimd { constexpr auto bits = std::numeric_limits::digits + std::numeric_limits::is_signed; static_assert(shift < bits, "Shift amount must be less than the number of bits in T"); - XSIMD_IF_CONSTEXPR(std::is_signed::value && sizeof(T) == 8) + if constexpr(std::is_signed::value && sizeof(T) == 8) { return _mm256_srai_epi64(self, shift); } @@ -617,7 +617,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch bitwise_rshift(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(std::is_signed::value && sizeof(T) == 8) + if constexpr(std::is_signed::value && sizeof(T) == 8) { return _mm256_srav_epi64(self, other); } @@ -631,11 +631,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch rotl(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm256_rolv_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm256_rolv_epi64(self, other); } @@ -654,11 +654,11 @@ namespace xsimd { constexpr auto bits = std::numeric_limits::digits + std::numeric_limits::is_signed; static_assert(count < bits, "Count must be less than the number of bits in T"); - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm256_rol_epi32(self, count); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm256_rol_epi64(self, count); } @@ -672,11 +672,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch rotr(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm256_rorv_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm256_rorv_epi64(self, other); } @@ -696,11 +696,11 @@ namespace xsimd { constexpr auto bits = std::numeric_limits::digits + std::numeric_limits::is_signed; static_assert(count < bits, "Count must be less than the number of bits in T"); - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return _mm256_ror_epi32(self, count); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm256_ror_epi64(self, count); } @@ -926,21 +926,21 @@ namespace xsimd template ::value>> XSIMD_INLINE batch select(batch_bool const& cond, batch const& true_br, batch const& false_br, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { batch_bool batch_cond = batch_bool::from_mask(cond.mask()); return _mm256_blendv_epi8(false_br, true_br, batch_cond); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { batch_bool batch_cond = batch_bool::from_mask(cond.mask()); return _mm256_blendv_epi8(false_br, true_br, batch_cond); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm256_mask_blend_epi32(cond, false_br, true_br); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm256_mask_blend_epi64(cond, false_br, true_br); } diff --git a/include/xsimd/arch/xsimd_avx_128.hpp b/include/xsimd/arch/xsimd_avx_128.hpp index 498db1066..1d2ab1c43 100644 --- a/include/xsimd/arch/xsimd_avx_128.hpp +++ b/include/xsimd/arch/xsimd_avx_128.hpp @@ -108,7 +108,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch load_masked(T const* mem, batch_bool_constant mask, convert, Mode, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(detail::lowers_to_plain_moves(mask)) + if constexpr(detail::lowers_to_plain_moves(mask)) { return load_masked(mem, mask, convert {}, Mode {}, sse2 {}); } @@ -137,7 +137,7 @@ namespace xsimd XSIMD_INLINE std::enable_if_t::value && (sizeof(T) == 4 || sizeof(T) == 8), batch> load_masked(T const* mem, batch_bool mask, convert, Mode, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { return bitwise_cast(batch(_mm_maskload_ps(reinterpret_cast(mem), __m128i(mask)))); } @@ -150,7 +150,7 @@ namespace xsimd template ::value>> XSIMD_INLINE void store_masked(T* mem, batch const& src, batch_bool_constant mask, Mode, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(detail::lowers_to_plain_moves(mask)) + if constexpr(detail::lowers_to_plain_moves(mask)) { store_masked(mem, src, mask, Mode {}, sse2 {}); } @@ -179,7 +179,7 @@ namespace xsimd XSIMD_INLINE std::enable_if_t::value && (sizeof(T) == 4 || sizeof(T) == 8), void> store_masked(T* mem, batch const& src, batch_bool mask, Mode, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { _mm_maskstore_ps(reinterpret_cast(mem), __m128i(mask), bitwise_cast(src)); } diff --git a/include/xsimd/arch/xsimd_neon.hpp b/include/xsimd/arch/xsimd_neon.hpp index 20bb67746..89520a335 100644 --- a/include/xsimd/arch/xsimd_neon.hpp +++ b/include/xsimd/arch/xsimd_neon.hpp @@ -551,7 +551,7 @@ namespace xsimd template static XSIMD_INLINE batch apply(T const* mem, batch acc) noexcept { - XSIMD_IF_CONSTEXPR(Value) + if constexpr(Value) { acc = insert(acc, mem[I], index {}); } @@ -3318,17 +3318,17 @@ namespace xsimd batch_constant, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(V0 == 0 && V1 == 0) + if constexpr(V0 == 0 && V1 == 0) { auto lo = vget_low_u64(self); return vcombine_u64(lo, lo); } - XSIMD_IF_CONSTEXPR(V0 == 1 && V1 == 1) + if constexpr(V0 == 1 && V1 == 1) { auto hi = vget_high_u64(self); return vcombine_u64(hi, hi); } - XSIMD_IF_CONSTEXPR(V0 == 0 && V1 == 1) + if constexpr(V0 == 0 && V1 == 1) { return self; } @@ -3374,35 +3374,35 @@ namespace xsimd constexpr bool is_dup_lo = detail::is_dup_lo(mask); constexpr bool is_dup_hi = detail::is_dup_hi(mask); - XSIMD_IF_CONSTEXPR(is_identity) + if constexpr(is_identity) { return self; } - XSIMD_IF_CONSTEXPR(is_dup_lo) + if constexpr(is_dup_lo) { - XSIMD_IF_CONSTEXPR(V0 == 0 && V1 == 1) + if constexpr(V0 == 0 && V1 == 1) { return vreinterpretq_u32_u64(vdupq_lane_u64(vget_low_u64(vreinterpretq_u64_u32(self)), 0)); } - XSIMD_IF_CONSTEXPR(V0 == 1 && V1 == 0) + if constexpr(V0 == 1 && V1 == 0) { return vreinterpretq_u32_u64(vdupq_lane_u64(vreinterpret_u64_u32(vrev64_u32(vget_low_u32(self))), 0)); } return vdupq_n_u32(vgetq_lane_u32(self, V0)); } - XSIMD_IF_CONSTEXPR(is_dup_hi) + if constexpr(is_dup_hi) { - XSIMD_IF_CONSTEXPR(V0 == 2 && V1 == 3) + if constexpr(V0 == 2 && V1 == 3) { return vreinterpretq_u32_u64(vdupq_lane_u64(vget_high_u64(vreinterpretq_u64_u32(self)), 0)); } - XSIMD_IF_CONSTEXPR(V0 == 3 && V1 == 2) + if constexpr(V0 == 3 && V1 == 2) { return vreinterpretq_u32_u64(vdupq_lane_u64(vreinterpret_u64_u32(vrev64_u32(vget_high_u32(self))), 0)); } return vdupq_n_u32(vgetq_lane_u32(self, V0)); } - XSIMD_IF_CONSTEXPR(V0 < 2 && V1 < 2 && V2 < 2 && V3 < 2) + if constexpr(V0 < 2 && V1 < 2 && V2 < 2 && V3 < 2) { uint8x8_t low = vreinterpret_u8_u64(vget_low_u64(vreinterpretq_u64_u32(self))); uint8x8_t mask_lo = detail::make_mask(); @@ -3411,7 +3411,7 @@ namespace xsimd uint8x8_t hi = vtbl1_u8(low, mask_hi); return vreinterpretq_u32_u8(vcombine_u8(lo, hi)); } - XSIMD_IF_CONSTEXPR(V0 >= 2 && V1 >= 2 && V2 >= 2 && V3 >= 2) + if constexpr(V0 >= 2 && V1 >= 2 && V2 >= 2 && V3 >= 2) { uint8x8_t high = vreinterpret_u8_u64(vget_high_u64(vreinterpretq_u64_u32(self))); uint8x8_t mask_lo = detail::make_mask(); @@ -3505,7 +3505,7 @@ namespace xsimd { // From https://github.com/DLTcollab/sse2neon/blob/master/sse2neon.h uint8x16_t msbs = vshrq_n_u8(self, 7); - XSIMD_IF_CONSTEXPR(detail::do_swap) + if constexpr(detail::do_swap) { msbs = vrev64q_u8(msbs); } @@ -3526,7 +3526,7 @@ namespace xsimd { // Adapted from https://github.com/DLTcollab/sse2neon/blob/master/sse2neon.h uint16x8_t msbs = vshrq_n_u16(self, 15); - XSIMD_IF_CONSTEXPR(detail::do_swap) + if constexpr(detail::do_swap) { msbs = vrev64q_u16(msbs); } @@ -3546,7 +3546,7 @@ namespace xsimd { // Adapted from https://github.com/DLTcollab/sse2neon/blob/master/sse2neon.h uint32x4_t msbs = vshrq_n_u32(self, 31); - XSIMD_IF_CONSTEXPR(detail::do_swap) + if constexpr(detail::do_swap) { msbs = vrev64q_u32(msbs); } @@ -3623,13 +3623,13 @@ namespace xsimd XSIMD_INLINE size_t OP(batch_bool const& self, requires_arch) noexcept \ { \ uint8x16_t inner = self; \ - XSIMD_IF_CONSTEXPR(detail::do_swap) \ + if constexpr(detail::do_swap) \ { \ inner = vrev16q_u8(inner); \ } \ \ uint8x8_t narrowed = vshrn_n_u16(vreinterpretq_u16_u8(inner), 4); \ - XSIMD_IF_CONSTEXPR(detail::do_swap) \ + if constexpr(detail::do_swap) \ { \ narrowed = vrev64_u8(narrowed); \ } \ @@ -3641,7 +3641,7 @@ namespace xsimd XSIMD_INLINE size_t OP(batch_bool const& self, requires_arch) noexcept \ { \ uint8x8_t narrowed = vmovn_u16(self); \ - XSIMD_IF_CONSTEXPR(detail::do_swap) \ + if constexpr(detail::do_swap) \ { \ narrowed = vrev64_u8(narrowed); \ } \ @@ -3653,7 +3653,7 @@ namespace xsimd XSIMD_INLINE size_t OP(batch_bool const& self, requires_arch) noexcept \ { \ uint16x4_t narrowed = vmovn_u32(self); \ - XSIMD_IF_CONSTEXPR(detail::do_swap) \ + if constexpr(detail::do_swap) \ { \ narrowed = vrev64_u16(narrowed); \ } \ @@ -3665,7 +3665,7 @@ namespace xsimd XSIMD_INLINE size_t OP(batch_bool const& self, requires_arch) noexcept \ { \ uint32x2_t narrowed = vmovn_u64(self); \ - XSIMD_IF_CONSTEXPR(detail::do_swap) \ + if constexpr(detail::do_swap) \ { \ narrowed = vrev64_u32(narrowed); \ } \ diff --git a/include/xsimd/arch/xsimd_rvv.hpp b/include/xsimd/arch/xsimd_rvv.hpp index 5983f525d..f4389b305 100644 --- a/include/xsimd/arch/xsimd_rvv.hpp +++ b/include/xsimd/arch/xsimd_rvv.hpp @@ -1338,7 +1338,7 @@ namespace xsimd template = 0> XSIMD_INLINE T get(batch const& arg, index, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(I == 0) + if constexpr(I == 0) { return detail_rvv::rvvmv_lane0(arg); } @@ -1348,7 +1348,7 @@ namespace xsimd template = 0> XSIMD_INLINE std::complex get(batch, A> const& arg, index, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(I == 0) + if constexpr(I == 0) { return std::complex { detail_rvv::rvvmv_lane0(arg.real()), detail_rvv::rvvmv_lane0(arg.imag()) }; } @@ -1498,7 +1498,7 @@ namespace xsimd template XSIMD_INLINE uint64_t mask(batch_bool const& self, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR((8 * sizeof(T)) >= batch_bool::size) + if constexpr((8 * sizeof(T)) >= batch_bool::size) { // (A) Easy case: the number of slots fits in T. const auto zero = detail_rvv::broadcast, types::detail::rvv_width_m1>(T(0)); @@ -1508,7 +1508,7 @@ namespace xsimd auto r = __riscv_vredor(self.data.as_mask(), upowers, (typename decltype(zero)::register_type)zero, batch_bool::size); return detail_rvv::reduce_scalar>(r); } - else XSIMD_IF_CONSTEXPR((2 * 8 * sizeof(T)) == batch_bool::size) + else if constexpr((2 * 8 * sizeof(T)) == batch_bool::size) { // (B) We need two rounds, one for the low part, one for the high part. diff --git a/include/xsimd/arch/xsimd_sse2.hpp b/include/xsimd/arch/xsimd_sse2.hpp index 920814c74..cd7179815 100644 --- a/include/xsimd/arch/xsimd_sse2.hpp +++ b/include/xsimd/arch/xsimd_sse2.hpp @@ -85,19 +85,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch add(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm_add_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_add_epi16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm_add_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm_add_epi64(self, other); } @@ -158,11 +158,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch avgr(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm_avg_epu8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_avg_epu16(self, other); } @@ -176,12 +176,12 @@ namespace xsimd template ::value>> XSIMD_INLINE batch avg(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { auto adj = ((self ^ other) << 7) >> 7; return avgr(self, other, A {}) - adj; } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { auto adj = ((self ^ other) << 15) >> 15; return avgr(self, other, A {}) - adj; @@ -272,19 +272,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch bitwise_lshift(batch const& self, int32_t other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm_and_si128(_mm_set1_epi8(0xFF << other), _mm_slli_epi32(self, other)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_slli_epi16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm_slli_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm_slli_epi64(self, other); } @@ -299,11 +299,11 @@ namespace xsimd { constexpr auto bits = std::numeric_limits::digits + std::numeric_limits::is_signed; static_assert(shift < bits, "Count must be less than the number of bits in T"); - XSIMD_IF_CONSTEXPR(shift == 0) + if constexpr(shift == 0) { return self; } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + else if constexpr(sizeof(T) == 1) { // 8-bit left shift via 16-bit shift + mask __m128i shifted = _mm_slli_epi16(self, static_cast(shift)); @@ -312,15 +312,15 @@ namespace xsimd const __m128i mask = _mm_set1_epi8(mask8); return _mm_and_si128(shifted, mask); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_slli_epi16(self, static_cast(shift)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm_slli_epi32(self, static_cast(shift)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm_slli_epi64(self, static_cast(shift)); } @@ -333,7 +333,7 @@ namespace xsimd XSIMD_INLINE batch bitwise_lshift( batch const& self, batch_constant shifts, requires_arch req) noexcept { - XSIMD_IF_CONSTEXPR(utils::all_equals(shifts)) + if constexpr(utils::all_equals(shifts)) { return bitwise_lshift(self, req); } @@ -347,7 +347,7 @@ namespace xsimd { using uint_t = std::make_unsigned_t; - XSIMD_IF_CONSTEXPR(utils::all_equals(shifts)) + if constexpr(utils::all_equals(shifts)) { return bitwise_lshift(self, req); } @@ -429,22 +429,22 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { __m128i sign_mask = _mm_set1_epi16((0xFF00 >> other) & 0x00FF); __m128i cmp_is_negative = _mm_cmpgt_epi8(_mm_setzero_si128(), self); __m128i res = _mm_srai_epi16(self, other); return _mm_or_si128(_mm_and_si128(sign_mask, cmp_is_negative), _mm_andnot_si128(sign_mask, res)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_srai_epi16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm_srai_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { // from https://github.com/samyvilar/vect/blob/master/vect_128.h return _mm_or_si128( @@ -461,19 +461,19 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm_and_si128(_mm_set1_epi8(0xFF >> other), _mm_srli_epi32(self, other)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_srli_epi16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm_srli_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm_srli_epi64(self, other); } @@ -491,14 +491,14 @@ namespace xsimd static_assert(shift < bits, "Shift must be less than the number of value bits in the type"); - XSIMD_IF_CONSTEXPR(shift == 0) + if constexpr(shift == 0) { return self; } - XSIMD_IF_CONSTEXPR(std::is_signed::value) + if constexpr(std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { // 8-bit arithmetic right shift via 16-bit shift + sign-extension handling. __m128i shifted = _mm_srai_epi16(self, static_cast(shift)); @@ -507,11 +507,11 @@ namespace xsimd return _mm_or_si128(_mm_and_si128(sign_mask, cmp_negative), _mm_andnot_si128(sign_mask, shifted)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_srai_epi16(self, static_cast(shift)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm_srai_epi32(self, static_cast(shift)); } @@ -520,7 +520,7 @@ namespace xsimd } else // unsigned / logical right shift { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { // 8-bit left shift via 16-bit shift + mask __m128i shifted = _mm_srli_epi16(self, static_cast(shift)); @@ -529,11 +529,11 @@ namespace xsimd const __m128i mask = _mm_set1_epi8(mask8); return _mm_and_si128(shifted, mask); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_srli_epi16(self, static_cast(shift)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm_srli_epi32(self, static_cast(shift)); } @@ -622,19 +622,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch broadcast(T val, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm_set1_epi8(val); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_set1_epi16(val); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm_set1_epi32(val); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm_set1_epi64x(val); } @@ -756,19 +756,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch_bool eq(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm_cmpeq_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_cmpeq_epi16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm_cmpeq_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { __m128i tmp1 = _mm_cmpeq_epi32(self, other); __m128i tmp2 = _mm_shuffle_epi32(tmp1, 0xB1); @@ -814,19 +814,19 @@ namespace xsimd template ::value>> XSIMD_INLINE T first(batch const& self, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return static_cast(_mm_cvtsi128_si32(self) & 0xFF); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return static_cast(_mm_cvtsi128_si32(self) & 0xFFFF); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return static_cast(_mm_cvtsi128_si32(self)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { #if defined(__x86_64__) return static_cast(_mm_cvtsi128_si64(self)); @@ -921,21 +921,21 @@ namespace xsimd 0xFFFFFF00, 0xFFFFFFFF, }; - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { assert(!(mask & ~0xFFFF) && "inbound mask"); return _mm_setr_epi32(lut32[mask & 0xF], lut32[(mask >> 4) & 0xF], lut32[(mask >> 8) & 0xF], lut32[mask >> 12]); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { assert(!(mask & ~0xFF) && "inbound mask"); return _mm_set_epi64x(lut64[mask >> 4], lut64[mask & 0xF]); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm_castps_si128(from_mask(batch_bool {}, mask, sse2 {})); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm_castpd_si128(from_mask(batch_bool {}, mask, sse2 {})); } @@ -964,15 +964,15 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm_cmpgt_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_cmpgt_epi16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm_cmpgt_epi32(self, other); } @@ -1025,7 +1025,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch insert(batch const& self, T val, index pos, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + if constexpr(sizeof(T) == 2) { return _mm_insert_epi16(self, val, I); } @@ -1117,23 +1117,23 @@ namespace xsimd template ::value>> XSIMD_INLINE batch load_masked(T const* mem, batch_bool_constant mask, convert, Mode, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 2 && mask.prefix() == 1) + if constexpr(sizeof(T) == 2 && mask.prefix() == 1) { return _mm_loadu_si16(mem); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4 && mask.prefix() == 1) + else if constexpr(sizeof(T) == 4 && mask.prefix() == 1) { return _mm_loadu_si32(mem); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8 && mask.prefix() == 1) + else if constexpr(sizeof(T) == 8 && mask.prefix() == 1) { return _mm_loadu_si64(mem); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2 && mask.prefix() == 2) + else if constexpr(sizeof(T) == 2 && mask.prefix() == 2) { return _mm_loadu_si32(mem); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4 && mask.prefix() == 2) + else if constexpr(sizeof(T) == 4 && mask.prefix() == 2) { return _mm_loadu_si64(mem); } @@ -1145,19 +1145,19 @@ namespace xsimd template XSIMD_INLINE batch load_masked(float const* mem, batch_bool_constant mask, convert, Mode, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(mask.prefix() == 1) + if constexpr(mask.prefix() == 1) { return _mm_load_ss(mem); } - else XSIMD_IF_CONSTEXPR(mask.prefix() == 2) + else if constexpr(mask.prefix() == 2) { return _mm_loadl_pi(_mm_setzero_ps(), reinterpret_cast<__m64 const*>(mem)); } - else XSIMD_IF_CONSTEXPR(mask.suffix() == 2) + else if constexpr(mask.suffix() == 2) { return _mm_loadh_pi(_mm_setzero_ps(), reinterpret_cast<__m64 const*>(mem + 2)); } - else XSIMD_IF_CONSTEXPR(mask.prefix() == 3) + else if constexpr(mask.prefix() == 3) { __m128 const lo2 = _mm_castsi128_ps(_mm_loadl_epi64(reinterpret_cast<__m128i const*>(mem))); return _mm_shuffle_ps(lo2, _mm_load_ss(mem + 2), _MM_SHUFFLE(3, 0, 1, 0)); @@ -1170,11 +1170,11 @@ namespace xsimd template XSIMD_INLINE batch load_masked(double const* mem, batch_bool_constant mask, convert, Mode, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(mask.prefix() == 1) + if constexpr(mask.prefix() == 1) { return _mm_load_sd(mem); } - else XSIMD_IF_CONSTEXPR(mask.suffix() == 1) + else if constexpr(mask.suffix() == 1) { return _mm_loadh_pd(_mm_setzero_pd(), mem + 1); } @@ -1188,19 +1188,19 @@ namespace xsimd template XSIMD_INLINE void store_masked(float* mem, batch const& src, batch_bool_constant mask, Mode, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(mask.prefix() == 1) + if constexpr(mask.prefix() == 1) { _mm_store_ss(mem, src); } - else XSIMD_IF_CONSTEXPR(mask.prefix() == 2) + else if constexpr(mask.prefix() == 2) { _mm_storel_pi(reinterpret_cast<__m64*>(mem), src); } - else XSIMD_IF_CONSTEXPR(mask.suffix() == 2) + else if constexpr(mask.suffix() == 2) { _mm_storeh_pi(reinterpret_cast<__m64*>(mem + 2), src); } - else XSIMD_IF_CONSTEXPR(mask.prefix() == 3) + else if constexpr(mask.prefix() == 3) { _mm_storel_pi(reinterpret_cast<__m64*>(mem), src); _mm_store_ss(mem + 2, _mm_movehl_ps(src, src)); @@ -1214,11 +1214,11 @@ namespace xsimd template XSIMD_INLINE void store_masked(double* mem, batch const& src, batch_bool_constant mask, Mode, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(mask.prefix() == 1) + if constexpr(mask.prefix() == 1) { _mm_store_sd(mem, src); } - else XSIMD_IF_CONSTEXPR(mask.suffix() == 1) + else if constexpr(mask.suffix() == 1) { _mm_storeh_pd(mem + 1, src); } @@ -1267,19 +1267,19 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm_cmplt_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_cmplt_epi16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm_cmplt_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { __m128i tmp1 = _mm_sub_epi64(self, other); __m128i tmp2 = _mm_xor_si128(self, other); @@ -1297,19 +1297,19 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm_cmplt_epi8(_mm_xor_si128(self, _mm_set1_epi8(std::numeric_limits::lowest())), _mm_xor_si128(other, _mm_set1_epi8(std::numeric_limits::lowest()))); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_cmplt_epi16(_mm_xor_si128(self, _mm_set1_epi16(std::numeric_limits::lowest())), _mm_xor_si128(other, _mm_set1_epi16(std::numeric_limits::lowest()))); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm_cmplt_epi32(_mm_xor_si128(self, _mm_set1_epi32(std::numeric_limits::lowest())), _mm_xor_si128(other, _mm_set1_epi32(std::numeric_limits::lowest()))); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { auto xself = _mm_xor_si128(self, _mm_set1_epi64x(std::numeric_limits::lowest())); auto xother = _mm_xor_si128(other, _mm_set1_epi64x(std::numeric_limits::lowest())); @@ -1370,20 +1370,20 @@ namespace xsimd template ::value>> XSIMD_INLINE uint64_t mask(batch_bool const& self, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm_movemask_epi8(self); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { uint64_t mask8 = _mm_movemask_epi8(self); return detail::mask_lut(mask8) | (detail::mask_lut(mask8 >> 8) << 4); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm_movemask_ps(_mm_castsi128_ps(self)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm_movemask_pd(_mm_castsi128_pd(self)); } @@ -1597,7 +1597,7 @@ namespace xsimd template ::value>> XSIMD_INLINE T reduce_add(batch const& self, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { __m128i tmp1 = _mm_shuffle_epi32(self, 0x0E); __m128i tmp2 = _mm_add_epi32(self, tmp1); @@ -1605,7 +1605,7 @@ namespace xsimd __m128i tmp4 = _mm_add_epi32(tmp2, tmp3); return _mm_cvtsi128_si32(tmp4); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { __m128i tmp1 = _mm_shuffle_epi32(self, 0x0E); __m128i tmp2 = _mm_add_epi64(self, tmp1); @@ -1693,7 +1693,7 @@ namespace xsimd template ::value>> XSIMD_INLINE T reduce_mul(batch const& self, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { batch tmp1 = _mm_shuffle_epi32(self, _MM_SHUFFLE(0, 1, 2, 3)); tmp1 = tmp1 * self; @@ -1701,7 +1701,7 @@ namespace xsimd tmp2 = tmp2 * tmp1; return _mm_cvtsi128_si32(tmp2); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { batch tmp1 = _mm_unpackhi_epi64(self, self); auto tmp2 = tmp1 * self; @@ -1818,11 +1818,11 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm_adds_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_adds_epi16(self, other); } @@ -1833,11 +1833,11 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm_adds_epu8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_adds_epu16(self, other); } @@ -1911,11 +1911,11 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm_subs_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_subs_epi16(self, other); } @@ -1926,11 +1926,11 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm_subs_epu8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_subs_epu16(self, other); } @@ -1949,13 +1949,13 @@ namespace xsimd { // GCC <12 have missing or buggy unaligned store intrinsics; use memcpy to work around this. // GCC/Clang/MSVC will turn it into the correct store. - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { // negate mask to convert to 0 or 1 auto val = _mm_sub_epi8(_mm_set1_epi8(0), b); memcpy(mem, &val, sizeof(val)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { auto val = _mm_sub_epi8(_mm_set1_epi8(0), _mm_packs_epi16(b, b)); #if defined(__x86_64__) @@ -1965,13 +1965,13 @@ namespace xsimd memcpy(mem, &val, sizeof(uint64_t)); #endif } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { auto pack_16 = _mm_packs_epi32(b, b); uint32_t val = _mm_cvtsi128_si32(_mm_sub_epi8(_mm_set1_epi8(0), _mm_packs_epi16(pack_16, pack_16))); memcpy(mem, &val, sizeof(val)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { auto pack_32 = _mm_packs_epi32(b, b); auto pack_16 = _mm_packs_epi32(pack_32, pack_32); @@ -2065,19 +2065,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch sub(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm_sub_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_sub_epi16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm_sub_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm_sub_epi64(self, other); } @@ -2141,11 +2141,11 @@ namespace xsimd constexpr bool is_dup_lo = detail::is_dup_lo(mask); constexpr bool is_dup_hi = detail::is_dup_hi(mask); - XSIMD_IF_CONSTEXPR(is_identity) + if constexpr(is_identity) { return self; } - XSIMD_IF_CONSTEXPR(is_dup_lo) + if constexpr(is_dup_lo) { // permute the low half constexpr int imm = detail::mod_shuffle(V0, V1, V2, V3); @@ -2154,7 +2154,7 @@ namespace xsimd const auto lo_all = _mm_unpacklo_epi64(lo, lo); return lo_all; } - XSIMD_IF_CONSTEXPR(is_dup_hi) + if constexpr(is_dup_hi) { // permute the high half constexpr int imm = detail::mod_shuffle(V4, V5, V6, V7); @@ -2164,7 +2164,7 @@ namespace xsimd return hi_all; } // Only pick elements from the low lane - XSIMD_IF_CONSTEXPR(detail::is_only_from_lo(mask)) + if constexpr(detail::is_only_from_lo(mask)) { // permute within each sub lane constexpr auto mask_lo = detail::mod_shuffle(V0, V1, V2, V3); @@ -2176,7 +2176,7 @@ namespace xsimd return _mm_unpacklo_epi64(lol, loh); } // Only pick elements from the high lane - XSIMD_IF_CONSTEXPR(detail::is_only_from_hi(mask)) + if constexpr(detail::is_only_from_hi(mask)) { // permute within each sub lane constexpr auto mask_lo = detail::mod_shuffle(V0, V1, V2, V3); @@ -2268,19 +2268,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch zip_hi(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm_unpackhi_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_unpackhi_epi16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm_unpackhi_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm_unpackhi_epi64(self, other); } @@ -2305,19 +2305,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch zip_lo(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm_unpacklo_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_unpacklo_epi16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm_unpacklo_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm_unpacklo_epi64(self, other); } @@ -2341,11 +2341,11 @@ namespace xsimd aligned_mode, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(mask.prefix() == 2) + if constexpr(mask.prefix() == 2) { _mm_storel_pi(reinterpret_cast<__m64*>(mem), src); } - else XSIMD_IF_CONSTEXPR(mask.suffix() == 2) + else if constexpr(mask.suffix() == 2) { _mm_storeh_pi(reinterpret_cast<__m64*>(mem + 2), src); } @@ -2378,11 +2378,11 @@ namespace xsimd XSIMD_INLINE typename std::enable_if::value && sizeof(T) <= 2, T>::type get(batch const& self, ::xsimd::index, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(I == 0) + if constexpr(I == 0) { return first(self, A {}); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return static_cast(_mm_extract_epi16(self, I)); } @@ -2397,7 +2397,7 @@ namespace xsimd XSIMD_INLINE typename std::enable_if<(std::is_integral::value && sizeof(T) >= 4) || std::is_floating_point::value, T>::type get(batch const& self, ::xsimd::index, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(I == 0) + if constexpr(I == 0) { return first(self, A {}); } diff --git a/include/xsimd/arch/xsimd_sse4_1.hpp b/include/xsimd/arch/xsimd_sse4_1.hpp index bcca84c44..913979415 100644 --- a/include/xsimd/arch/xsimd_sse4_1.hpp +++ b/include/xsimd/arch/xsimd_sse4_1.hpp @@ -83,7 +83,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch_bool eq(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + if constexpr(sizeof(T) == 8) { return _mm_cmpeq_epi64(self, other); } @@ -109,23 +109,23 @@ namespace xsimd template ::value>> XSIMD_INLINE T get(batch const& self, ::xsimd::index, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(I == 0) + if constexpr(I == 0) { return first(self, sse2 {}); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + else if constexpr(sizeof(T) == 1) { return static_cast(_mm_extract_epi8(self, I)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return static_cast(_mm_extract_epi16(self, I)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return static_cast(_mm_extract_epi32(self, I)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { #if defined(__x86_64__) return static_cast(_mm_extract_epi64(self, I)); @@ -144,15 +144,15 @@ namespace xsimd template ::value>> XSIMD_INLINE batch insert(batch const& self, T val, index pos, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm_insert_epi8(self, val, I); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm_insert_epi32(self, val, I); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { #if (!defined(_MSC_VER) && __x86_64__) || (_MSC_VER > 1900 && defined(_M_X64)) return _mm_insert_epi64(self, val, I); @@ -176,7 +176,7 @@ namespace xsimd { // GCC <12 have missing or buggy unaligned load intrinsics; use memcpy to work around this. // GCC/Clang/MSVC will turn it into the correct load. - XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + if constexpr(sizeof(T) == 2) { #if defined(__x86_64__) uint64_t tmp; @@ -188,13 +188,13 @@ namespace xsimd #endif return { _mm_sub_epi16(_mm_set1_epi8(0), _mm_cvtepu8_epi16(val)) }; } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { uint32_t tmp; memcpy(&tmp, mem, sizeof(tmp)); return { _mm_sub_epi32(_mm_set1_epi8(0), _mm_cvtepu8_epi32(_mm_cvtsi32_si128(tmp))) }; } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { uint16_t tmp; memcpy(&tmp, mem, sizeof(tmp)); @@ -225,15 +225,15 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm_max_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_max_epi16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm_max_epi32(self, other); } @@ -244,15 +244,15 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm_max_epu8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_max_epu16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm_max_epu32(self, other); } @@ -286,15 +286,15 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm_min_epi8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_min_epi16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm_min_epi32(self, other); } @@ -305,15 +305,15 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm_min_epu8(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_min_epu16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm_min_epu32(self, other); } @@ -328,21 +328,21 @@ namespace xsimd template ::value>> XSIMD_INLINE batch mul(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm_or_si128( _mm_and_si128(_mm_mullo_epi16(self, other), _mm_srli_epi16(_mm_cmpeq_epi8(self, self), 8)), _mm_slli_epi16(_mm_mullo_epi16(_mm_srli_epi16(self, 8), _mm_srli_epi16(other, 8)), 8)); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_mullo_epi16(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm_mullo_epi32(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm_add_epi64( _mm_mul_epu32(self, other), @@ -446,16 +446,16 @@ namespace xsimd XSIMD_INLINE batch select(batch_bool_constant const&, batch const& true_br, batch const& false_br, requires_arch) noexcept { constexpr int mask = batch_bool_constant::mask(); - XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + if constexpr(sizeof(T) == 2) { return _mm_blend_epi16(false_br, true_br, mask); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { constexpr int imask = detail::interleave(mask); return _mm_blend_epi16(false_br, true_br, imask); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { constexpr int imask = detail::interleave(mask); constexpr int imask2 = detail::interleave(imask); @@ -498,9 +498,9 @@ namespace xsimd __m128i x_lo = x; __m128i x_hi = _mm_unpackhi_epi64(x, x); __m128i lo, hi; - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { - XSIMD_IF_CONSTEXPR(std::is_signed::value) + if constexpr(std::is_signed::value) { lo = _mm_cvtepi32_epi64(x_lo); hi = _mm_cvtepi32_epi64(x_hi); @@ -511,9 +511,9 @@ namespace xsimd hi = _mm_cvtepu32_epi64(x_hi); } } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { - XSIMD_IF_CONSTEXPR(std::is_signed::value) + if constexpr(std::is_signed::value) { lo = _mm_cvtepi16_epi32(x_lo); hi = _mm_cvtepi16_epi32(x_hi); @@ -524,9 +524,9 @@ namespace xsimd hi = _mm_cvtepu16_epi32(x_hi); } } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + else if constexpr(sizeof(T) == 1) { - XSIMD_IF_CONSTEXPR(std::is_signed::value) + if constexpr(std::is_signed::value) { lo = _mm_cvtepi8_epi16(x_lo); hi = _mm_cvtepi8_epi16(x_hi); diff --git a/include/xsimd/arch/xsimd_ssse3.hpp b/include/xsimd/arch/xsimd_ssse3.hpp index bae3fb9c4..d6b969c3f 100644 --- a/include/xsimd/arch/xsimd_ssse3.hpp +++ b/include/xsimd/arch/xsimd_ssse3.hpp @@ -29,19 +29,19 @@ namespace xsimd template ::value && std::is_signed::value>> XSIMD_INLINE batch abs(batch const& self, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return _mm_abs_epi8(self); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return _mm_abs_epi16(self); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return _mm_abs_epi32(self); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return _mm_abs_epi64(self); } @@ -86,14 +86,14 @@ namespace xsimd template ::value>> XSIMD_INLINE T reduce_add(batch const& self, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + if constexpr(sizeof(T) == 2) { __m128i tmp1 = _mm_hadd_epi16(self, self); __m128i tmp2 = _mm_hadd_epi16(tmp1, tmp1); __m128i tmp3 = _mm_hadd_epi16(tmp2, tmp2); return _mm_cvtsi128_si32(tmp3) & 0xFFFF; } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { __m128i tmp1 = _mm_hadd_epi32(self, self); __m128i tmp2 = _mm_hadd_epi32(tmp1, tmp1); diff --git a/include/xsimd/arch/xsimd_vsx.hpp b/include/xsimd/arch/xsimd_vsx.hpp index 4a184136d..99f6e7d4f 100644 --- a/include/xsimd/arch/xsimd_vsx.hpp +++ b/include/xsimd/arch/xsimd_vsx.hpp @@ -125,7 +125,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch avg(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) < 8) + if constexpr(sizeof(T) < 8) { constexpr auto nbit = 8 * sizeof(T) - 1; auto adj = bitwise_cast(bitwise_cast>((self ^ other) << nbit) >> nbit); @@ -217,7 +217,7 @@ namespace xsimd { using shift_type = as_unsigned_integer_t; batch shift(static_cast(other)); - XSIMD_IF_CONSTEXPR(std::is_signed::value) + if constexpr(std::is_signed::value) { return vec_sra(self.data, shift.data); } @@ -730,7 +730,7 @@ namespace xsimd template XSIMD_INLINE batch slide_left(batch const& x, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(N == batch::size * sizeof(T)) + if constexpr(N == batch::size * sizeof(T)) { return batch(0); } @@ -745,7 +745,7 @@ namespace xsimd template XSIMD_INLINE batch slide_right(batch const& x, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(N == batch::size * sizeof(T)) + if constexpr(N == batch::size * sizeof(T)) { return batch(0); } diff --git a/include/xsimd/arch/xsimd_vxe.hpp b/include/xsimd/arch/xsimd_vxe.hpp index c419daa52..6cf952eec 100644 --- a/include/xsimd/arch/xsimd_vxe.hpp +++ b/include/xsimd/arch/xsimd_vxe.hpp @@ -441,7 +441,7 @@ namespace xsimd template ::value, void>::type> XSIMD_INLINE T reduce_add(batch const& self, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { using t = typename batch::register_type; t shifted_64 = vec_sld(self.data, self.data, 8); @@ -449,7 +449,7 @@ namespace xsimd t shifted_32 = vec_sld(added_1, added_1, 4); return (added_1 + shifted_32)[0]; } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { using t = typename batch::register_type; t shifted_64 = vec_sld(self.data, self.data, 8); @@ -489,7 +489,7 @@ namespace xsimd template XSIMD_INLINE batch slide_left(batch const& x, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(N == batch::size * sizeof(T)) + if constexpr(N == batch::size * sizeof(T)) { return batch(0); } @@ -504,7 +504,7 @@ namespace xsimd template XSIMD_INLINE batch slide_right(batch const& x, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(N == batch::size * sizeof(T)) + if constexpr(N == batch::size * sizeof(T)) { return batch(0); } diff --git a/include/xsimd/arch/xsimd_wasm.hpp b/include/xsimd/arch/xsimd_wasm.hpp index b657bbd6b..76428cf3a 100644 --- a/include/xsimd/arch/xsimd_wasm.hpp +++ b/include/xsimd/arch/xsimd_wasm.hpp @@ -47,19 +47,19 @@ namespace xsimd template ::value && std::is_signed::value>> XSIMD_INLINE batch abs(batch const& self, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return wasm_i8x16_abs(self); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return wasm_i16x8_abs(self); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return wasm_i32x4_abs(self); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return wasm_i64x2_abs(self); } @@ -86,19 +86,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch add(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return wasm_i8x16_add(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return wasm_i16x8_add(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return wasm_i32x4_add(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return wasm_i64x2_add(self, other); } @@ -125,11 +125,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch avgr(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return wasm_u8x16_avgr(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return wasm_u16x8_avgr(self, other); } @@ -143,12 +143,12 @@ namespace xsimd template ::value>> XSIMD_INLINE batch avg(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { auto adj = ((self ^ other) << 7) >> 7; return avgr(self, other, A {}) - adj; } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { auto adj = ((self ^ other) << 15) >> 15; return avgr(self, other, A {}) - adj; @@ -250,19 +250,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch bitwise_lshift(batch const& self, int32_t other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return wasm_i8x16_shl(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return wasm_i16x8_shl(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return wasm_i32x4_shl(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return wasm_i64x2_shl(self, other); } @@ -279,19 +279,19 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return wasm_i8x16_shr(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return wasm_i16x8_shr(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return wasm_i32x4_shr(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return wasm_i64x2_shr(self, other); } @@ -303,19 +303,19 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return wasm_u8x16_shr(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return wasm_u16x8_shr(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return wasm_u32x4_shr(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return wasm_u64x2_shr(self, other); } @@ -362,19 +362,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch broadcast(T val, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return wasm_i8x16_splat(val); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return wasm_i16x8_splat(val); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return wasm_i32x4_splat(val); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return wasm_i64x2_splat(val); } @@ -428,19 +428,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch_bool eq(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return wasm_i8x16_eq(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return wasm_i16x8_eq(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return wasm_i32x4_eq(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return wasm_i64x2_eq(self, other); } @@ -453,19 +453,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch_bool eq(batch_bool const& self, batch_bool const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return wasm_i8x16_eq(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return wasm_i16x8_eq(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return wasm_i32x4_eq(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return wasm_i64x2_eq(self, other); } @@ -541,19 +541,19 @@ namespace xsimd template ::value>> XSIMD_INLINE T first(batch const& self, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return wasm_i8x16_extract_lane(self, 0); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return wasm_i16x8_extract_lane(self, 0); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return wasm_i32x4_extract_lane(self, 0); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return wasm_i64x2_extract_lane(self, 0); } @@ -682,22 +682,22 @@ namespace xsimd { 0x0000000000000000ul, 0xFFFFFFFFFFFFFFFFul }, { 0xFFFFFFFFFFFFFFFFul, 0xFFFFFFFFFFFFFFFFul }, }; - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { assert(!(mask & ~0xFFFF) && "inbound mask"); return wasm_i32x4_make(lut32[mask & 0xF], lut32[(mask >> 4) & 0xF], lut32[(mask >> 8) & 0xF], lut32[mask >> 12]); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { assert(!(mask & ~0xFF) && "inbound mask"); return wasm_i64x2_make(lut64[mask & 0xF], lut64[mask >> 4]); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { assert(!(mask & ~0xFul) && "inbound mask"); return wasm_v128_load((const v128_t*)lut16[mask]); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { assert(!(mask & ~0x3ul) && "inbound mask"); return wasm_v128_load((const v128_t*)lut8[mask]); @@ -727,19 +727,19 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return wasm_i8x16_gt(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return wasm_i16x8_gt(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return wasm_i32x4_gt(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return wasm_i64x2_gt(self, other); } @@ -751,15 +751,15 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return wasm_u8x16_gt(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return wasm_u16x8_gt(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return wasm_u32x4_gt(self, other); } @@ -808,19 +808,19 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return wasm_i8x16_replace_lane(self, pos, val); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return wasm_i16x8_replace_lane(self, pos, val); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return wasm_i32x4_replace_lane(self, pos, val); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return wasm_i64x2_replace_lane(self, pos, val); } @@ -832,19 +832,19 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return wasm_u8x16_replace_lane(self, pos, val); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return wasm_u16x8_replace_lane(self, pos, val); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return wasm_u32x4_replace_lane(self, pos, val); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return wasm_u64x2_replace_lane(self, pos, val); } @@ -946,19 +946,19 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return wasm_i8x16_lt(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return wasm_i16x8_lt(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return wasm_i32x4_lt(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return wasm_i64x2_lt(self, other); } @@ -970,19 +970,19 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return wasm_u8x16_lt(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return wasm_u16x8_lt(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return wasm_u32x4_lt(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { auto xself = wasm_v128_xor(self, wasm_i64x2_splat(std::numeric_limits::lowest())); auto xother = wasm_v128_xor(other, wasm_i64x2_splat(std::numeric_limits::lowest())); @@ -1012,19 +1012,19 @@ namespace xsimd template ::value>> XSIMD_INLINE uint64_t mask(batch_bool const& self, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return wasm_i8x16_bitmask(self); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return wasm_i16x8_bitmask(self); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return wasm_i32x4_bitmask(self); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return wasm_i64x2_bitmask(self); } @@ -1096,19 +1096,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch neg(batch const& self, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return wasm_i8x16_neg(self); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return wasm_i16x8_neg(self); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return wasm_i32x4_neg(self); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return wasm_i64x2_neg(self); } @@ -1191,7 +1191,7 @@ namespace xsimd template ::value>> XSIMD_INLINE T reduce_add(batch const& self, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { v128_t tmp0 = wasm_i32x4_shuffle(self, wasm_i32x4_splat(0), 2, 3, 0, 0); v128_t tmp1 = wasm_i32x4_add(self, tmp0); @@ -1199,7 +1199,7 @@ namespace xsimd v128_t tmp3 = wasm_i32x4_add(tmp1, tmp2); return wasm_i32x4_extract_lane(tmp3, 0); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { v128_t tmp0 = wasm_i32x4_shuffle(self, wasm_i32x4_splat(0), 2, 3, 0, 0); v128_t tmp1 = wasm_i64x2_add(self, tmp0); @@ -1232,7 +1232,7 @@ namespace xsimd template ::value>> XSIMD_INLINE T reduce_mul(batch const& self, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { v128_t tmp0 = wasm_i32x4_shuffle(self, wasm_i32x4_splat(0), 2, 3, 0, 0); v128_t tmp1 = wasm_i32x4_mul(self, tmp0); @@ -1240,7 +1240,7 @@ namespace xsimd v128_t tmp3 = wasm_i32x4_mul(tmp1, tmp2); return wasm_i32x4_extract_lane(tmp3, 0); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { v128_t tmp0 = wasm_i32x4_shuffle(self, wasm_i32x4_splat(0), 2, 3, 0, 0); v128_t tmp1 = wasm_i64x2_mul(self, tmp0); @@ -1312,11 +1312,11 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return wasm_i8x16_add_sat(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return wasm_i16x8_add_sat(self, other); } @@ -1327,11 +1327,11 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return wasm_u8x16_add_sat(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return wasm_u16x8_add_sat(self, other); } @@ -1443,11 +1443,11 @@ namespace xsimd { if (std::is_signed::value) { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return wasm_i8x16_sub_sat(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return wasm_i16x8_sub_sat(self, other); } @@ -1458,11 +1458,11 @@ namespace xsimd } else { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return wasm_u8x16_sub_sat(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return wasm_u16x8_sub_sat(self, other); } @@ -1553,19 +1553,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch sub(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return wasm_i8x16_sub(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return wasm_i16x8_sub(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return wasm_i32x4_sub(self, other); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return wasm_i64x2_sub(self, other); } @@ -1662,7 +1662,7 @@ namespace xsimd { assert((matrix_end - matrix_begin == batch::size) && "correctly sized matrix"); (void)matrix_end; - XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + if constexpr(sizeof(T) == 4) { auto r0 = matrix_begin[0], r1 = matrix_begin[1], r2 = matrix_begin[2], r3 = matrix_begin[3]; @@ -1677,7 +1677,7 @@ namespace xsimd matrix_begin[2] = wasm_i32x4_shuffle(t1, t3, 0, 1, 4, 5); // r0[2] r1[2] r2[2] r3[2] matrix_begin[3] = wasm_i32x4_shuffle(t1, t3, 2, 3, 6, 7); // r0[3] r1[3] r2[3] r3[3] } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { auto r0 = matrix_begin[0], r1 = matrix_begin[1]; @@ -1749,19 +1749,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch zip_hi(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return wasm_i8x16_shuffle(self, other, 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return wasm_i16x8_shuffle(self, other, 4, 12, 5, 13, 6, 14, 7, 15); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return wasm_i32x4_shuffle(self, other, 2, 6, 3, 7); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return wasm_i64x2_shuffle(self, other, 1, 3); } @@ -1786,19 +1786,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch zip_lo(batch const& self, batch const& other, requires_arch) noexcept { - XSIMD_IF_CONSTEXPR(sizeof(T) == 1) + if constexpr(sizeof(T) == 1) { return wasm_i8x16_shuffle(self, other, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 2) + else if constexpr(sizeof(T) == 2) { return wasm_i16x8_shuffle(self, other, 0, 8, 1, 9, 2, 10, 3, 11); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 4) + else if constexpr(sizeof(T) == 4) { return wasm_i32x4_shuffle(self, other, 0, 4, 1, 5); } - else XSIMD_IF_CONSTEXPR(sizeof(T) == 8) + else if constexpr(sizeof(T) == 8) { return wasm_i64x2_shuffle(self, other, 0, 2); } diff --git a/include/xsimd/config/xsimd_macros.hpp b/include/xsimd/config/xsimd_macros.hpp index fb178db91..e066d929e 100644 --- a/include/xsimd/config/xsimd_macros.hpp +++ b/include/xsimd/config/xsimd_macros.hpp @@ -60,19 +60,4 @@ #define XSIMD_NO_DISCARD #endif -#ifdef __cpp_if_constexpr -// this means that the compiler supports the `if constexpr` construct -#define XSIMD_IF_CONSTEXPR if constexpr -#endif - -#if !defined(XSIMD_IF_CONSTEXPR) && XSIMD_CPP_VERSION >= 201703L -// this means that the previous test failed, but we are using C++17 or higher -#define XSIMD_IF_CONSTEXPR if constexpr -#endif - -#if !defined(XSIMD_IF_CONSTEXPR) -// this means that all the previous checks failed, so we fallback to a normal `if` -#define XSIMD_IF_CONSTEXPR if -#endif - #endif diff --git a/include/xsimd/types/xsimd_batch.hpp b/include/xsimd/types/xsimd_batch.hpp index db7832b6f..d04d1238b 100644 --- a/include/xsimd/types/xsimd_batch.hpp +++ b/include/xsimd/types/xsimd_batch.hpp @@ -850,11 +850,11 @@ namespace xsimd detail::static_check_supported_config(); static_assert(std::is_same::value || std::is_same::value, "supported load mode"); - XSIMD_IF_CONSTEXPR(mask.all()) + if constexpr(mask.all()) { return load(mem, mode); } - else XSIMD_IF_CONSTEXPR(mask.none()) + else if constexpr(mask.none()) { return broadcast(0); } @@ -881,11 +881,11 @@ namespace xsimd detail::static_check_supported_config(); static_assert(std::is_same::value || std::is_same::value, "supported store mode"); - XSIMD_IF_CONSTEXPR(mask.none()) + if constexpr(mask.none()) { return; } - else XSIMD_IF_CONSTEXPR(mask.all()) + else if constexpr(mask.all()) { store(mem, mode); } diff --git a/test/test_batch.cpp b/test/test_batch.cpp index 28480b001..3cdb2e481 100644 --- a/test/test_batch.cpp +++ b/test/test_batch.cpp @@ -1135,7 +1135,7 @@ struct batch_test void init_operands() { - XSIMD_IF_CONSTEXPR(std::is_integral::value) + if constexpr(std::is_integral::value) { for (size_t i = 0; i < size; ++i) { From 6182521dc9ca83bff0026df5d275832991e0beca Mon Sep 17 00:00:00 2001 From: Johan Mabille Date: Wed, 15 Jul 2026 16:11:38 +0200 Subject: [PATCH 2/4] Use cxx_std_17 --- CMakeLists.txt | 2 +- test/CMakeLists.txt | 17 ----------------- 2 files changed, 1 insertion(+), 18 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index 0b120539b..82f7d0a22 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -40,7 +40,7 @@ target_include_directories(xsimd INTERFACE $ $) -target_compile_features(xsimd INTERFACE cxx_std_14) +target_compile_features(xsimd INTERFACE cxx_std_17) # Only add xtl build option to the build tree, that is, if xsimd being locally # developed or is vendored. diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt index c159977f7..a34dafde9 100644 --- a/test/CMakeLists.txt +++ b/test/CMakeLists.txt @@ -59,23 +59,6 @@ if (CMAKE_CXX_COMPILER_ID MATCHES "Clang" OR CMAKE_CXX_COMPILER_ID MATCHES "GNU" set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wunused-parameter -Wextra -Wreorder") if (CMAKE_CXX_COMPILER_ID MATCHES "Clang") set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wshorten-64-to-32") - endif() - # Users may override the c++ standard: - if(NOT DEFINED CMAKE_CXX_STANDARD OR "${CMAKE_CXX_STANDARD}" STREQUAL "") - if (ENABLE_XTL_COMPLEX) - CHECK_CXX_COMPILER_FLAG("-std=c++17" HAS_CPP17_FLAG) - if (NOT HAS_CPP17_FLAG) - message(FATAL_ERROR "Unsupported compiler -- xsimd requires C++17 support when xtl complex support is enabled") - endif() - set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -std=c++17") - else() - CHECK_CXX_COMPILER_FLAG("-std=c++14" HAS_CPP14_FLAG) - if (NOT HAS_CPP14_FLAG) - message(FATAL_ERROR "Unsupported compiler -- xsimd requires C++14 support!") - else() - set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -std=c++14") - endif() - endif() endif() if (NOT CROSS_COMPILE_ARM) From cccace324957bf4097089295214764fba91d58d6 Mon Sep 17 00:00:00 2001 From: Johan Mabille Date: Wed, 15 Jul 2026 16:40:47 +0200 Subject: [PATCH 3/4] Remove XIMSD_NO_DISCARD, use [[nodiscard]] instead --- docs/Doxyfile | 3 +- include/xsimd/config/xsimd_macros.hpp | 23 ------------ include/xsimd/types/xsimd_batch.hpp | 50 +++++++++++++-------------- 3 files changed, 26 insertions(+), 50 deletions(-) diff --git a/docs/Doxyfile b/docs/Doxyfile index c574a8579..6ea1a5664 100644 --- a/docs/Doxyfile +++ b/docs/Doxyfile @@ -46,6 +46,5 @@ WARN_AS_ERROR = NO ENABLE_PREPROCESSING = YES MACRO_EXPANSION = YES EXPAND_ONLY_PREDEF = YES -PREDEFINED = XSIMD_NO_DISCARD= \ - XSIMD_INLINE=inline \ +PREDEFINED = XSIMD_INLINE=inline \ DOXYGEN_SHOULD_SKIP_THIS= diff --git a/include/xsimd/config/xsimd_macros.hpp b/include/xsimd/config/xsimd_macros.hpp index e066d929e..6c5b6fa16 100644 --- a/include/xsimd/config/xsimd_macros.hpp +++ b/include/xsimd/config/xsimd_macros.hpp @@ -37,27 +37,4 @@ #define XSIMD_NO_NANS #endif -#if defined(__has_cpp_attribute) -// if this check passes, then the compiler supports feature test macros -#if __has_cpp_attribute(nodiscard) >= 201603L -// if this check passes, then the compiler supports [[nodiscard]] without a message -#define XSIMD_NO_DISCARD [[nodiscard]] -#endif -#endif - -#if !defined(XSIMD_NO_DISCARD) && XSIMD_CPP_VERSION >= 201703L -// this means that the previous tests failed, but we are using C++17 or higher -#define XSIMD_NO_DISCARD [[nodiscard]] -#endif - -#if !defined(XSIMD_NO_DISCARD) && (defined(__GNUC__) || defined(__clang__)) -// this means that the previous checks failed, but we are using GCC or Clang -#define XSIMD_NO_DISCARD __attribute__((warn_unused_result)) -#endif - -#if !defined(XSIMD_NO_DISCARD) -// this means that all the previous checks failed, so we fallback to doing nothing -#define XSIMD_NO_DISCARD -#endif - #endif diff --git a/include/xsimd/types/xsimd_batch.hpp b/include/xsimd/types/xsimd_batch.hpp index d04d1238b..f45c155af 100644 --- a/include/xsimd/types/xsimd_batch.hpp +++ b/include/xsimd/types/xsimd_batch.hpp @@ -256,7 +256,7 @@ namespace xsimd XSIMD_INLINE register_type to_native() const noexcept; template - XSIMD_NO_DISCARD static XSIMD_INLINE batch broadcast(U val) noexcept; + [[nodiscard]] static XSIMD_INLINE batch broadcast(U val) noexcept; // memory operators template @@ -278,24 +278,24 @@ namespace xsimd XSIMD_INLINE void store(T* mem, batch_bool mask, Mode = {}) const noexcept; template - XSIMD_NO_DISCARD static XSIMD_INLINE batch load_aligned(U const* mem) noexcept; + [[nodiscard]] static XSIMD_INLINE batch load_aligned(U const* mem) noexcept; template - XSIMD_NO_DISCARD static XSIMD_INLINE batch load_unaligned(U const* mem) noexcept; + [[nodiscard]] static XSIMD_INLINE batch load_unaligned(U const* mem) noexcept; template - XSIMD_NO_DISCARD static XSIMD_INLINE batch load(U const* mem, aligned_mode) noexcept; + [[nodiscard]] static XSIMD_INLINE batch load(U const* mem, aligned_mode) noexcept; template - XSIMD_NO_DISCARD static XSIMD_INLINE batch load(U const* mem, unaligned_mode) noexcept; + [[nodiscard]] static XSIMD_INLINE batch load(U const* mem, unaligned_mode) noexcept; // Masked overloads template - XSIMD_NO_DISCARD static XSIMD_INLINE batch load(U const* mem, batch_bool_constant mask, Mode = {}) noexcept; + [[nodiscard]] static XSIMD_INLINE batch load(U const* mem, batch_bool_constant mask, Mode = {}) noexcept; /** \brief Runtime-mask load; see xsimd::load(T const*, batch_bool, Mode). */ template - XSIMD_NO_DISCARD static XSIMD_INLINE batch load(T const* mem, batch_bool mask, Mode = {}) noexcept; + [[nodiscard]] static XSIMD_INLINE batch load(T const* mem, batch_bool mask, Mode = {}) noexcept; template - XSIMD_NO_DISCARD static XSIMD_INLINE batch load(U const* mem, stream_mode) noexcept; + [[nodiscard]] static XSIMD_INLINE batch load(U const* mem, stream_mode) noexcept; template - XSIMD_NO_DISCARD static XSIMD_INLINE batch gather(U const* src, batch const& index) noexcept; + [[nodiscard]] static XSIMD_INLINE batch gather(U const* src, batch const& index) noexcept; template XSIMD_INLINE void scatter(U* dst, batch const& index) const noexcept; @@ -459,9 +459,9 @@ namespace xsimd XSIMD_INLINE void store_aligned(bool* mem) const noexcept; XSIMD_INLINE void store_unaligned(bool* mem) const noexcept; XSIMD_INLINE void store_stream(bool* mem) const noexcept; - XSIMD_NO_DISCARD static XSIMD_INLINE batch_bool load_aligned(bool const* mem) noexcept; - XSIMD_NO_DISCARD static XSIMD_INLINE batch_bool load_unaligned(bool const* mem) noexcept; - XSIMD_NO_DISCARD static XSIMD_INLINE batch_bool load_stream(bool const* mem) noexcept; + [[nodiscard]] static XSIMD_INLINE batch_bool load_aligned(bool const* mem) noexcept; + [[nodiscard]] static XSIMD_INLINE batch_bool load_unaligned(bool const* mem) noexcept; + [[nodiscard]] static XSIMD_INLINE batch_bool load_stream(bool const* mem) noexcept; XSIMD_INLINE bool get(std::size_t i) const noexcept; @@ -533,28 +533,28 @@ namespace xsimd XSIMD_INLINE explicit batch(batch_bool_type const& b) noexcept; template - XSIMD_NO_DISCARD static XSIMD_INLINE batch broadcast(U val) noexcept; + [[nodiscard]] static XSIMD_INLINE batch broadcast(U val) noexcept; // memory operators - XSIMD_NO_DISCARD static XSIMD_INLINE batch load_aligned(const T* real_src, const T* imag_src = nullptr) noexcept; - XSIMD_NO_DISCARD static XSIMD_INLINE batch load_unaligned(const T* real_src, const T* imag_src = nullptr) noexcept; + [[nodiscard]] static XSIMD_INLINE batch load_aligned(const T* real_src, const T* imag_src = nullptr) noexcept; + [[nodiscard]] static XSIMD_INLINE batch load_unaligned(const T* real_src, const T* imag_src = nullptr) noexcept; XSIMD_INLINE void store_aligned(T* real_dst, T* imag_dst) const noexcept; XSIMD_INLINE void store_unaligned(T* real_dst, T* imag_dst) const noexcept; - XSIMD_NO_DISCARD static XSIMD_INLINE batch load_aligned(const value_type* src) noexcept; - XSIMD_NO_DISCARD static XSIMD_INLINE batch load_unaligned(const value_type* src) noexcept; + [[nodiscard]] static XSIMD_INLINE batch load_aligned(const value_type* src) noexcept; + [[nodiscard]] static XSIMD_INLINE batch load_unaligned(const value_type* src) noexcept; XSIMD_INLINE void store_aligned(value_type* dst) const noexcept; XSIMD_INLINE void store_unaligned(value_type* dst) const noexcept; template - XSIMD_NO_DISCARD static XSIMD_INLINE batch load(U const* mem, aligned_mode) noexcept; + [[nodiscard]] static XSIMD_INLINE batch load(U const* mem, aligned_mode) noexcept; template - XSIMD_NO_DISCARD static XSIMD_INLINE batch load(U const* mem, unaligned_mode) noexcept; + [[nodiscard]] static XSIMD_INLINE batch load(U const* mem, unaligned_mode) noexcept; // Compile-time mask overloads template - XSIMD_NO_DISCARD static XSIMD_INLINE batch load(U const* mem, batch_bool_constant mask, Mode = {}) noexcept; + [[nodiscard]] static XSIMD_INLINE batch load(U const* mem, batch_bool_constant mask, Mode = {}) noexcept; template - XSIMD_NO_DISCARD static XSIMD_INLINE batch load(U const* mem, stream_mode) noexcept; + [[nodiscard]] static XSIMD_INLINE batch load(U const* mem, stream_mode) noexcept; template XSIMD_INLINE void store(U* mem, aligned_mode) const noexcept; template @@ -580,9 +580,9 @@ namespace xsimd XSIMD_INLINE batch(xtl::xcomplex val0, xtl::xcomplex val1, Ts... vals) noexcept; template - XSIMD_NO_DISCARD static XSIMD_INLINE batch load_aligned(const xtl::xcomplex* src) noexcept; + [[nodiscard]] static XSIMD_INLINE batch load_aligned(const xtl::xcomplex* src) noexcept; template - XSIMD_NO_DISCARD static XSIMD_INLINE batch load_unaligned(const xtl::xcomplex* src) noexcept; + [[nodiscard]] static XSIMD_INLINE batch load_unaligned(const xtl::xcomplex* src) noexcept; template XSIMD_INLINE void store_aligned(xtl::xcomplex* dst) const noexcept; template @@ -723,7 +723,7 @@ namespace xsimd */ template template - XSIMD_NO_DISCARD XSIMD_INLINE batch batch::broadcast(U val) noexcept + [[nodiscard]] XSIMD_INLINE batch batch::broadcast(U val) noexcept { detail::static_check_supported_config(); return batch(static_cast(val)); @@ -1450,7 +1450,7 @@ namespace xsimd template template - XSIMD_NO_DISCARD XSIMD_INLINE batch, A> batch, A>::broadcast(U val) noexcept + [[nodiscard]] XSIMD_INLINE batch, A> batch, A>::broadcast(U val) noexcept { return batch(static_cast>(val)); } From acb5e104c21cf99efb690b8bf488f71ee2d8fe2b Mon Sep 17 00:00:00 2001 From: Johan Mabille Date: Wed, 15 Jul 2026 16:50:27 +0200 Subject: [PATCH 4/4] Fixed linter --- docs/source/vectorized_code.rst | 2 +- .../xsimd/arch/common/xsimd_common_bit.hpp | 14 +- .../xsimd/arch/common/xsimd_common_memory.hpp | 10 +- include/xsimd/arch/xsimd_avx.hpp | 109 ++++---- include/xsimd/arch/xsimd_avx2.hpp | 234 ++++++++--------- include/xsimd/arch/xsimd_avx2_128.hpp | 20 +- include/xsimd/arch/xsimd_avx512bw.hpp | 130 ++++----- include/xsimd/arch/xsimd_avx512dq.hpp | 6 +- include/xsimd/arch/xsimd_avx512f.hpp | 218 +++++++-------- include/xsimd/arch/xsimd_avx512vbmi2.hpp | 8 +- include/xsimd/arch/xsimd_avx512vl_128.hpp | 70 ++--- include/xsimd/arch/xsimd_avx512vl_256.hpp | 74 +++--- include/xsimd/arch/xsimd_avx_128.hpp | 8 +- include/xsimd/arch/xsimd_neon.hpp | 104 ++++---- include/xsimd/arch/xsimd_neon64.hpp | 10 +- include/xsimd/arch/xsimd_rvv.hpp | 8 +- include/xsimd/arch/xsimd_sse2.hpp | 248 +++++++++--------- include/xsimd/arch/xsimd_sse4_1.hpp | 74 +++--- include/xsimd/arch/xsimd_ssse3.hpp | 12 +- include/xsimd/arch/xsimd_vsx.hpp | 8 +- include/xsimd/arch/xsimd_vxe.hpp | 8 +- include/xsimd/arch/xsimd_wasm.hpp | 202 +++++++------- include/xsimd/types/xsimd_batch.hpp | 8 +- test/test_batch.cpp | 2 +- 24 files changed, 798 insertions(+), 789 deletions(-) diff --git a/docs/source/vectorized_code.rst b/docs/source/vectorized_code.rst index dbdf538a2..4313a1989 100644 --- a/docs/source/vectorized_code.rst +++ b/docs/source/vectorized_code.rst @@ -106,7 +106,7 @@ One that is simple and compiles on all platforms is using C++17 ``if constexpr`` xsimd::batch const& y ) -> xsimd::batch { // Dedicated instruction dispatch at compile time - if constexpr(std::is_same_v){ + if constexpr (std::is_same_v){ // Automatic conversion back and forth between xsimd::batch and native types return _mm256_sign_epi8(x, y); // When compiler complains we can be more explicit diff --git a/include/xsimd/arch/common/xsimd_common_bit.hpp b/include/xsimd/arch/common/xsimd_common_bit.hpp index 1c03f595a..cba28cf95 100644 --- a/include/xsimd/arch/common/xsimd_common_bit.hpp +++ b/include/xsimd/arch/common/xsimd_common_bit.hpp @@ -57,7 +57,7 @@ namespace xsimd #if XSIMD_HAS_BUILTIN(__builtin_popcountg) return __builtin_popcountg(x); #else - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { #if XSIMD_HAS_BUILTIN(__builtin_popcount) return __builtin_popcount(x); @@ -68,7 +68,7 @@ namespace xsimd return ((uint64_t)x * 0x200040008001ULL & 0x111111111111111ULL) % 0xf; #endif } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { #if XSIMD_HAS_BUILTIN(__builtin_popcount) return __builtin_popcount(x); @@ -85,7 +85,7 @@ namespace xsimd + (((v & 0xfff000) >> 12) * msb12 & mask5) % 0x1f; #endif } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { #if XSIMD_HAS_BUILTIN(__builtin_popcount) return __builtin_popcount(x); @@ -132,7 +132,7 @@ namespace xsimd if (x == 0) return sizeof(T) * CHAR_BIT; - if constexpr(sizeof(T) <= 4) + if constexpr (sizeof(T) <= 4) { #if XSIMD_HAS_BUILTIN(__builtin_clz) return __builtin_clz((unsigned int)x) - (4 - sizeof(T)) * CHAR_BIT; @@ -144,11 +144,11 @@ namespace xsimd x |= x >> 1; x |= x >> 2; x |= x >> 4; - if constexpr(sizeof(T) >= 2) + if constexpr (sizeof(T) >= 2) { x |= x >> 8; } - if constexpr(sizeof(T) >= 4) + if constexpr (sizeof(T) >= 4) { x |= x >> 16; } @@ -192,7 +192,7 @@ namespace xsimd if (x == 0) return sizeof(T) * CHAR_BIT; - if constexpr(sizeof(T) <= 4) + if constexpr (sizeof(T) <= 4) { #if XSIMD_HAS_BUILTIN(__builtin_ctz) return __builtin_ctz((unsigned int)x); diff --git a/include/xsimd/arch/common/xsimd_common_memory.hpp b/include/xsimd/arch/common/xsimd_common_memory.hpp index 3b053fda7..df3515688 100644 --- a/include/xsimd/arch/common/xsimd_common_memory.hpp +++ b/include/xsimd/arch/common/xsimd_common_memory.hpp @@ -655,27 +655,27 @@ namespace xsimd static_assert(bsize == batch::size, "valid shuffle"); // Detect common patterns - if constexpr(detail::is_swizzle_fst(bsize, Indices...)) + if constexpr (detail::is_swizzle_fst(bsize, Indices...)) { return swizzle(x, batch_constant= bsize) ? 0 /* never happens */ : Indices)...>()); } - if constexpr(detail::is_swizzle_snd(bsize, Indices...)) + if constexpr (detail::is_swizzle_snd(bsize, Indices...)) { return swizzle(y, batch_constant= bsize) ? (Indices - bsize) : 0 /* never happens */)...>()); } - if constexpr(detail::is_zip_lo(bsize, Indices...)) + if constexpr (detail::is_zip_lo(bsize, Indices...)) { return zip_lo(x, y); } - if constexpr(detail::is_zip_hi(bsize, Indices...)) + if constexpr (detail::is_zip_hi(bsize, Indices...)) { return zip_hi(x, y); } - if constexpr(detail::is_select(bsize, Indices...)) + if constexpr (detail::is_select(bsize, Indices...)) { return select(batch_bool_constant(), x, y); } diff --git a/include/xsimd/arch/xsimd_avx.hpp b/include/xsimd/arch/xsimd_avx.hpp index 52bbf6972..240c2a9f4 100644 --- a/include/xsimd/arch/xsimd_avx.hpp +++ b/include/xsimd/arch/xsimd_avx.hpp @@ -420,19 +420,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch broadcast(T val, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm256_set1_epi8(val); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm256_set1_epi16(val); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm256_set1_epi32(val); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm256_set1_epi64x(val); } @@ -641,7 +641,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch_bool from_mask(batch_bool const&, uint64_t mask, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { alignas(A::alignment()) static const uint32_t lut32[] = { 0x00000000, @@ -667,7 +667,7 @@ namespace xsimd lut32[(mask >> 16) & 0xF], lut32[(mask >> 20) & 0xF], lut32[(mask >> 24) & 0xF], lut32[mask >> 28]); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { alignas(A::alignment()) static const uint64_t lut64[] = { 0x0000000000000000ul, @@ -690,11 +690,11 @@ namespace xsimd assert(!(mask & ~0xFFFFul) && "inbound mask"); return _mm256_setr_epi64x(lut64[mask & 0xF], lut64[(mask >> 4) & 0xF], lut64[(mask >> 8) & 0xF], lut64[(mask >> 12) & 0xF]); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm256_castps_si256(from_mask(batch_bool {}, mask, avx {})); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm256_castpd_si256(from_mask(batch_bool {}, mask, avx {})); } @@ -765,19 +765,19 @@ namespace xsimd template ::value>> XSIMD_INLINE T first(batch const& self, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return static_cast(_mm_cvtsi128_si32(_mm256_castsi256_si128(self)) & 0xFF); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return static_cast(_mm_cvtsi128_si32(_mm256_castsi256_si128(self)) & 0xFFFF); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return static_cast(_mm_cvtsi128_si32(_mm256_castsi256_si128(self))); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { batch low = _mm256_castsi256_si128(self); return first(low, sse4_2 {}); @@ -793,7 +793,10 @@ namespace xsimd template XSIMD_INLINE float get(batch const& self, ::xsimd::index, requires_arch) noexcept { - if constexpr(I == 0) { return first(self, avx {}); } + if constexpr (I == 0) + { + return first(self, avx {}); + } constexpr size_t elements_per_lane = batch::size; constexpr size_t lane = I / elements_per_lane; constexpr size_t sub_index = I % elements_per_lane; @@ -804,7 +807,10 @@ namespace xsimd template XSIMD_INLINE double get(batch const& self, ::xsimd::index, requires_arch) noexcept { - if constexpr(I == 0) { return first(self, avx {}); } + if constexpr (I == 0) + { + return first(self, avx {}); + } constexpr size_t elements_per_lane = batch::size; constexpr size_t lane = I / elements_per_lane; constexpr size_t sub_index = I % elements_per_lane; @@ -815,7 +821,10 @@ namespace xsimd template ::value>> XSIMD_INLINE T get(batch const& self, ::xsimd::index, requires_arch) noexcept { - if constexpr(I == 0) { return first(self, avx {}); } + if constexpr (I == 0) + { + return first(self, avx {}); + } constexpr size_t elements_per_lane = batch::size; constexpr size_t lane = I / elements_per_lane; constexpr size_t sub_index = I % elements_per_lane; @@ -828,15 +837,15 @@ namespace xsimd XSIMD_INLINE batch insert(batch const& self, T val, index pos, requires_arch) noexcept { #if !defined(_MSC_VER) || _MSC_VER > 1900 - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm256_insert_epi8(self, val, I); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm256_insert_epi16(self, val, I); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm256_insert_epi32(self, val, I); } @@ -1021,7 +1030,7 @@ namespace xsimd XSIMD_INLINE std::enable_if_t::value && (sizeof(T) == 4 || sizeof(T) == 8), batch> load_masked(T const* mem, batch_bool mask, convert, Mode, requires_arch) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return bitwise_cast(batch(_mm256_maskload_ps(reinterpret_cast(mem), __m256i(mask)))); } @@ -1040,7 +1049,7 @@ namespace xsimd using half_arch = typename half_batch::arch_type; // exactly the lower 128-bit half: one plain load, upper lanes zero - if constexpr(mask.prefix() == half_size) + if constexpr (mask.prefix() == half_size) { // cross-check the plain move via countr_one/countl_zero (independent of prefix()) assert(mask.countr_one() >= half_size && mask.countl_zero() >= half_size && "lower half fully active, upper empty"); @@ -1048,7 +1057,7 @@ namespace xsimd } // lower 128-bit half: stay in the value domain so the half kernel can // lower pure-prefix shapes to plain narrow moves (movss/movlps/movsd) - else if constexpr(mask.countl_zero() >= half_size) + else if constexpr (mask.countl_zero() >= half_size) { constexpr auto mlo = ::xsimd::detail::lower_half(mask); const auto lo = load_masked(mem, mlo, convert {}, Mode {}, half_arch {}); @@ -1056,7 +1065,7 @@ namespace xsimd } // prefix crossing the 128-bit boundary: plain lower half + // prefix-masked upper half (mirrors the store side) - else if constexpr(mask.prefix() > half_size && mask.prefix() < batch::size) + else if constexpr (mask.prefix() > half_size && mask.prefix() < batch::size) { // the plain lower-half load reads every lower lane, so they must all be active assert(mask.countr_one() >= half_size && "plain lower-half load needs the lower half fully active"); @@ -1066,13 +1075,13 @@ namespace xsimd return detail::merge_sse(lo.data, hi.data); } // exactly the upper 128-bit half: one plain load into the upper lanes - else if constexpr(mask.suffix() == half_size) + else if constexpr (mask.suffix() == half_size) { assert(mask.countl_one() >= half_size && mask.countr_zero() >= half_size && "upper half fully active, lower empty"); return detail::zero_extend(half_batch::load(mem + half_size, Mode {})); } // upper 128-bit half - else if constexpr(mask.countr_zero() >= half_size) + else if constexpr (mask.countr_zero() >= half_size) { constexpr auto mhi = ::xsimd::detail::upper_half(mask); const auto hi = load_masked(mem + half_size, mhi, convert {}, Mode {}, half_arch {}); @@ -1116,7 +1125,7 @@ namespace xsimd using half_arch = typename half_batch::arch_type; // exactly the lower 128-bit half: one plain store - if constexpr(mask.prefix() == half_size) + if constexpr (mask.prefix() == half_size) { // a plain store writes every lower lane and no upper lane, so the mask // must have the lower half fully active and the upper half empty @@ -1126,7 +1135,7 @@ namespace xsimd } // prefix crossing the 128-bit boundary: plain lower half + prefix-masked // upper half. Never emits vmaskmov, which does not store-forward. - else if constexpr(mask.prefix() > half_size && mask.prefix() < batch::size) + else if constexpr (mask.prefix() > half_size && mask.prefix() < batch::size) { assert(mask.countr_one() >= half_size && "plain lower-half store needs the lower half fully active"); const half_batch lo = detail::lower_half(src); @@ -1136,21 +1145,21 @@ namespace xsimd store_masked(mem + half_size, hi, mhi, Mode {}, half_arch {}); } // exactly the upper 128-bit half: one plain store - else if constexpr(mask.suffix() == half_size) + else if constexpr (mask.suffix() == half_size) { assert(mask.countl_one() >= half_size && mask.countr_zero() >= half_size && "upper half fully active, lower empty"); const half_batch hi = detail::upper_half(src); hi.store(mem + half_size, Mode {}); } // lower 128-bit half - else if constexpr(mask.countl_zero() >= half_size) + else if constexpr (mask.countl_zero() >= half_size) { constexpr auto mlo = ::xsimd::detail::lower_half(mask); const half_batch lo = detail::lower_half(src); store_masked(mem, lo, mlo, Mode {}, half_arch {}); } // upper 128-bit half - else if constexpr(mask.countr_zero() >= half_size) + else if constexpr (mask.countr_zero() >= half_size) { constexpr auto mhi = ::xsimd::detail::upper_half(mask); const half_batch hi = detail::upper_half(src); @@ -1182,7 +1191,7 @@ namespace xsimd XSIMD_INLINE std::enable_if_t::value && (sizeof(T) == 4 || sizeof(T) == 8), void> store_masked(T* mem, batch const& src, batch_bool mask, Mode, requires_arch) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { _mm256_maskstore_ps(reinterpret_cast(mem), __m256i(mask), bitwise_cast(src)); } @@ -1255,16 +1264,16 @@ namespace xsimd template ::value>> XSIMD_INLINE uint64_t mask(batch_bool const& self, requires_arch) noexcept { - if constexpr(sizeof(T) == 1 || sizeof(T) == 2) + if constexpr (sizeof(T) == 1 || sizeof(T) == 2) { __m128i self_low = detail::lower_half(self), self_high = detail::upper_half(self); return mask(batch_bool(self_low), sse4_2 {}) | (mask(batch_bool(self_high), sse4_2 {}) << (128 / (8 * sizeof(T)))); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm256_movemask_ps(_mm256_castsi256_ps(self)); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm256_movemask_pd(_mm256_castsi256_pd(self)); } @@ -1863,16 +1872,16 @@ namespace xsimd constexpr bool is_dup_low = detail::is_dup_lo(mask); constexpr bool is_dup_hi = detail::is_dup_hi(mask); constexpr bool is_dup = is_dup_low || is_dup_hi; - if constexpr(is_identity) + if constexpr (is_identity) { return self; } - if constexpr(is_dup) + if constexpr (is_dup) { constexpr auto control = is_dup_low ? 0x00 : 0x11; constexpr auto is_dup_identity = is_dup_low ? detail::is_identity() : detail::is_identity(); auto split = _mm256_permute2f128_ps(self, self, control); - if constexpr(!is_dup_identity) + if constexpr (!is_dup_identity) { constexpr auto shuffle_mask = is_dup_low ? detail::mod_shuffle(V0, V1, V2, V3) : detail::mod_shuffle(V4 - 4, V5 - 4, V6 - 4, V7 - 4); split = _mm256_permute_ps(split, shuffle_mask); @@ -1880,12 +1889,12 @@ namespace xsimd return split; } constexpr auto lane_mask = mask % std::integral_constant(); - if constexpr(detail::is_only_from_lo(mask)) + if constexpr (detail::is_only_from_lo(mask)) { __m256 broadcast = _mm256_permute2f128_ps(self, self, 0x00); // [low | low] return _mm256_permutevar_ps(broadcast, lane_mask.as_batch()); } - if constexpr(detail::is_only_from_hi(mask)) + if constexpr (detail::is_only_from_hi(mask)) { __m256 broadcast = _mm256_permute2f128_ps(self, self, 0x11); // [high | high] return _mm256_permutevar_ps(broadcast, lane_mask.as_batch()); @@ -1916,20 +1925,20 @@ namespace xsimd { // cannot use detail::mod_shuffle as the mod and shift are different in this case constexpr auto imm = ((V0 % 2) << 0) | ((V1 % 2) << 1) | ((V2 % 2) << 2) | ((V3 % 2) << 3); - if constexpr(detail::is_identity(mask)) + if constexpr (detail::is_identity(mask)) { return self; } - if constexpr(!detail::is_cross_lane(mask)) + if constexpr (!detail::is_cross_lane(mask)) { return _mm256_permute_pd(self, imm); } - if constexpr(detail::is_only_from_lo(mask)) + if constexpr (detail::is_only_from_lo(mask)) { __m256d broadcast = _mm256_permute2f128_pd(self, self, 0x00); // [low | low] return _mm256_permute_pd(broadcast, imm); } - if constexpr(detail::is_only_from_hi(mask)) + if constexpr (detail::is_only_from_hi(mask)) { __m256d broadcast = _mm256_permute2f128_pd(self, self, 0x11); // [high | high] return _mm256_permute_pd(broadcast, imm); @@ -2141,7 +2150,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch zip_hi(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1 || sizeof(T) == 2) + if constexpr (sizeof(T) == 1 || sizeof(T) == 2) { // extract high word __m128i self_hi = _mm256_extractf128_si256(self, 1); @@ -2149,7 +2158,7 @@ namespace xsimd // interleave __m128i res_lo, res_hi; - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { res_lo = _mm_unpacklo_epi8(self_hi, other_hi); res_hi = _mm_unpackhi_epi8(self_hi, other_hi); @@ -2167,13 +2176,13 @@ namespace xsimd _mm_castsi128_ps(res_hi), 1)); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { auto lo = _mm256_unpacklo_ps(_mm256_castsi256_ps(self), _mm256_castsi256_ps(other)); auto hi = _mm256_unpackhi_ps(_mm256_castsi256_ps(self), _mm256_castsi256_ps(other)); return _mm256_castps_si256(_mm256_permute2f128_ps(lo, hi, 0x31)); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { auto lo = _mm256_unpacklo_pd(_mm256_castsi256_pd(self), _mm256_castsi256_pd(other)); auto hi = _mm256_unpackhi_pd(_mm256_castsi256_pd(self), _mm256_castsi256_pd(other)); @@ -2204,7 +2213,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch zip_lo(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1 || sizeof(T) == 2) + if constexpr (sizeof(T) == 1 || sizeof(T) == 2) { // extract low word __m128i self_lo = _mm256_extractf128_si256(self, 0); @@ -2212,7 +2221,7 @@ namespace xsimd // interleave __m128i res_lo, res_hi; - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { res_lo = _mm_unpacklo_epi8(self_lo, other_lo); res_hi = _mm_unpackhi_epi8(self_lo, other_lo); @@ -2230,13 +2239,13 @@ namespace xsimd _mm_castsi128_ps(res_hi), 1)); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { auto lo = _mm256_unpacklo_ps(_mm256_castsi256_ps(self), _mm256_castsi256_ps(other)); auto hi = _mm256_unpackhi_ps(_mm256_castsi256_ps(self), _mm256_castsi256_ps(other)); return _mm256_castps_si256(_mm256_insertf128_ps(lo, _mm256_castps256_ps128(hi), 1)); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { auto lo = _mm256_unpacklo_pd(_mm256_castsi256_pd(self), _mm256_castsi256_pd(other)); auto hi = _mm256_unpackhi_pd(_mm256_castsi256_pd(self), _mm256_castsi256_pd(other)); diff --git a/include/xsimd/arch/xsimd_avx2.hpp b/include/xsimd/arch/xsimd_avx2.hpp index 3bba83d4e..5a44290ea 100644 --- a/include/xsimd/arch/xsimd_avx2.hpp +++ b/include/xsimd/arch/xsimd_avx2.hpp @@ -33,15 +33,15 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm256_abs_epi8(self); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm256_abs_epi16(self); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm256_abs_epi32(self); } @@ -57,19 +57,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch add(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm256_add_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm256_add_epi16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm256_add_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm256_add_epi64(self, other); } @@ -83,11 +83,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch avgr(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm256_avg_epu8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm256_avg_epu16(self, other); } @@ -101,12 +101,12 @@ namespace xsimd template ::value>> XSIMD_INLINE batch avg(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { auto adj = ((self ^ other) << 7) >> 7; return avgr(self, other, A {}) - adj; } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { auto adj = ((self ^ other) << 15) >> 15; return avgr(self, other, A {}) - adj; @@ -124,7 +124,7 @@ namespace xsimd template XSIMD_INLINE __m256i maskload(T const* mem, __m256i mask) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { static_assert(sizeof(int) == 4, "_mm256_maskload_epi32 requires a 4-byte int"); return _mm256_maskload_epi32(reinterpret_cast(mem), mask); @@ -139,7 +139,7 @@ namespace xsimd template XSIMD_INLINE void maskstore(T* mem, __m256i mask, __m256i src) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { static_assert(sizeof(int) == 4, "_mm256_maskstore_epi32 requires a 4-byte int"); _mm256_maskstore_epi32(reinterpret_cast(mem), mask, src); @@ -238,15 +238,15 @@ namespace xsimd template ::value>> XSIMD_INLINE batch bitwise_lshift(batch const& self, int32_t other, requires_arch) noexcept { - if constexpr(sizeof(T) == 2) + if constexpr (sizeof(T) == 2) { return _mm256_slli_epi16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm256_slli_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm256_slli_epi64(self, other); } @@ -261,24 +261,24 @@ namespace xsimd { constexpr auto bits = std::numeric_limits::digits + std::numeric_limits::is_signed; static_assert(shift < bits, "Shift must be less than the number of bits in T"); - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { // 8-bit left shift via 16-bit shift + mask __m256i shifted = _mm256_slli_epi16(self, shift); - // TODO(C++17): without `if constexpr` we must ensure the compile-time shift does not overflow + // TODO(C++17): without `if constexpr ` we must ensure the compile-time shift does not overflow constexpr uint8_t mask8 = static_cast(sizeof(T) == 1 ? (~0u << shift) : 0); const __m256i mask = _mm256_set1_epi8(mask8); return _mm256_and_si256(shifted, mask); } - if constexpr(sizeof(T) == 2) + if constexpr (sizeof(T) == 2) { return _mm256_slli_epi16(self, shift); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm256_slli_epi32(self, shift); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm256_slli_epi64(self, shift); } @@ -287,11 +287,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch bitwise_lshift(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm256_sllv_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm256_sllv_epi64(self, other); } @@ -314,7 +314,7 @@ namespace xsimd // AVX2 only supports 16-bit shifts with a uniform bitshift value, // otherwise emulate using 32-bit shifts. - if constexpr(utils::all_equals(shifts)) + if constexpr (utils::all_equals(shifts)) { return bitwise_lshift(self, req); } @@ -342,7 +342,7 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { __m256i sign_mask = _mm256_set1_epi16((0xFF00 >> other) & 0x00FF); __m256i cmp_is_negative = _mm256_cmpgt_epi8(_mm256_setzero_si256(), self); @@ -353,11 +353,11 @@ namespace xsimd sign_mask, cmp_is_negative), _mm256_andnot_si256(sign_mask, res)); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm256_srai_epi16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm256_srai_epi32(self, other); } @@ -368,15 +368,15 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 2) + if constexpr (sizeof(T) == 2) { return _mm256_srli_epi16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm256_srli_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm256_srli_epi64(self, other); } @@ -394,7 +394,7 @@ namespace xsimd static_assert(shift < bits, "Shift amount must be less than the number of bits in T"); if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { __m256i sign_mask = _mm256_set1_epi16((0xFF00 >> shift) & 0x00FF); __m256i cmp_is_negative = _mm256_cmpgt_epi8(_mm256_setzero_si256(), self); @@ -405,11 +405,11 @@ namespace xsimd sign_mask, cmp_is_negative), _mm256_andnot_si256(sign_mask, res)); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm256_srai_epi16(self, shift); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm256_srai_epi32(self, shift); } @@ -420,24 +420,24 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { // 8-bit left shift via 16-bit shift + mask const __m256i shifted = _mm256_srli_epi16(self, shift); - // TODO(C++17): without `if constexpr` we must ensure the compile-time shift does not overflow + // TODO(C++17): without `if constexpr ` we must ensure the compile-time shift does not overflow constexpr uint8_t mask8 = static_cast(sizeof(T) == 1 ? ((1u << shift) - 1u) : 0); const __m256i mask = _mm256_set1_epi8(mask8); return _mm256_and_si256(shifted, mask); } - if constexpr(sizeof(T) == 2) + if constexpr (sizeof(T) == 2) { return _mm256_srli_epi16(self, shift); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm256_srli_epi32(self, shift); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm256_srli_epi64(self, shift); } @@ -449,7 +449,7 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm256_srav_epi32(self, other); } @@ -460,11 +460,11 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm256_srlv_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm256_srlv_epi64(self, other); } @@ -545,19 +545,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch_bool eq(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm256_cmpeq_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm256_cmpeq_epi16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm256_cmpeq_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm256_cmpeq_epi64(self, other); } @@ -630,19 +630,19 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm256_cmpgt_epi8(other, self); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm256_cmpgt_epi16(other, self); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm256_cmpgt_epi32(other, self); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm256_cmpgt_epi64(other, self); } @@ -686,18 +686,18 @@ namespace xsimd template ::value>> XSIMD_INLINE batch_bool load_unaligned(bool const* mem, batch_bool, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return { _mm256_sub_epi8(_mm256_set1_epi8(0), _mm256_loadu_si256((__m256i const*)mem)) }; } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { auto bpack = _mm_loadu_si128((__m128i const*)mem); return { _mm256_sub_epi16(_mm256_set1_epi8(0), _mm256_cvtepu8_epi16(bpack)) }; } // GCC <12 have missing or buggy unaligned load intrinsics; use memcpy to work around this. // GCC/Clang/MSVC will turn it into the correct load. - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { #if defined(__x86_64__) uint64_t tmp; @@ -709,7 +709,7 @@ namespace xsimd #endif return { _mm256_sub_epi32(_mm256_set1_epi8(0), _mm256_cvtepu8_epi32(val)) }; } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { uint32_t tmp; memcpy(&tmp, mem, sizeof(tmp)); @@ -738,11 +738,11 @@ namespace xsimd template ::value>> XSIMD_INLINE uint64_t mask(batch_bool const& self, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return 0xFFFFFFFF & (uint64_t)_mm256_movemask_epi8(self); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { uint64_t mask8 = 0xFFFFFFFF & (uint64_t)_mm256_movemask_epi8(self); return detail::mask_lut(mask8) | (detail::mask_lut(mask8 >> 8) << 4) | (detail::mask_lut(mask8 >> 16) << 8) | (detail::mask_lut(mask8 >> 24) << 12); @@ -759,15 +759,15 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm256_max_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm256_max_epi16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm256_max_epi32(self, other); } @@ -778,15 +778,15 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm256_max_epu8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm256_max_epu16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm256_max_epu32(self, other); } @@ -803,15 +803,15 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm256_min_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm256_min_epi16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm256_min_epi32(self, other); } @@ -822,15 +822,15 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm256_min_epu8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm256_min_epu16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm256_min_epu32(self, other); } @@ -845,7 +845,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch mul(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { __m256i mask_hi = _mm256_set1_epi32(0xFF00FF00); __m256i res_lo = _mm256_mullo_epi16(self, other); @@ -855,15 +855,15 @@ namespace xsimd __m256i res = _mm256_blendv_epi8(res_lo, res_hi, mask_hi); return res; } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm256_mullo_epi16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm256_mullo_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm256_add_epi64( _mm256_mul_epu32(self, other), @@ -966,7 +966,7 @@ namespace xsimd template ::value>> XSIMD_INLINE T reduce_add(batch const& self, requires_arch) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { __m256i tmp1 = _mm256_hadd_epi32(self, self); __m256i tmp2 = _mm256_hadd_epi32(tmp1, tmp1); @@ -974,7 +974,7 @@ namespace xsimd __m128i tmp4 = _mm_add_epi32(_mm256_castsi256_si128(tmp2), tmp3); return _mm_cvtsi128_si32(tmp4); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { __m256i tmp1 = _mm256_shuffle_epi32(self, 0x0E); __m256i tmp2 = _mm256_add_epi64(self, tmp1); @@ -1040,11 +1040,11 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm256_adds_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm256_adds_epi16(self, other); } @@ -1055,11 +1055,11 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm256_adds_epu8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm256_adds_epu16(self, other); } @@ -1074,19 +1074,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch select(batch_bool const& cond, batch const& true_br, batch const& false_br, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm256_blendv_epi8(false_br, true_br, cond); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm256_blendv_epi8(false_br, true_br, cond); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm256_blendv_epi8(false_br, true_br, cond); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm256_blendv_epi8(false_br, true_br, cond); } @@ -1101,12 +1101,12 @@ namespace xsimd // FIXME: for some reason mask here is not considered as an immediate, // but it's okay for _mm256_blend_epi32 // case 2: return _mm256_blend_epi16(false_br, true_br, mask); - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { constexpr int mask = batch_bool_constant::mask(); return _mm256_blend_epi32(false_br, true_br, mask); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { constexpr int mask = batch_bool_constant::mask(); constexpr int imask = detail::interleave(mask); @@ -1188,7 +1188,7 @@ namespace xsimd { // GCC <12 have missing or buggy unaligned store intrinsics; use memcpy to work around this. // GCC/Clang/MSVC will turn it into the correct store. - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { // negate mask to convert to 0 or 1 auto val = _mm256_sub_epi8(_mm256_set1_epi8(0), b); @@ -1198,12 +1198,12 @@ namespace xsimd auto b_hi = _mm256_extractf128_si256(b, 1); auto b_lo = _mm256_castsi256_si128(b); - if constexpr(sizeof(T) == 2) + if constexpr (sizeof(T) == 2) { auto val = _mm_sub_epi8(_mm_set1_epi8(0), _mm_packs_epi16(b_lo, b_hi)); memcpy(mem, &val, sizeof(val)); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { auto pack_16 = _mm_packs_epi32(b_lo, b_hi); auto val = _mm_sub_epi8(_mm_set1_epi8(0), _mm_packs_epi16(pack_16, pack_16)); @@ -1214,7 +1214,7 @@ namespace xsimd memcpy(mem, &val, sizeof(uint64_t)); #endif } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { uint32_t mask = _mm256_movemask_epi8(_mm256_srli_epi64(b, 56)); memcpy(mem, &mask, sizeof(mask)); @@ -1242,11 +1242,11 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm256_subs_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm256_subs_epi16(self, other); } @@ -1257,11 +1257,11 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm256_subs_epu8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm256_subs_epu16(self, other); } @@ -1276,19 +1276,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch sub(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm256_sub_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm256_sub_epi16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm256_sub_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm256_sub_epi64(self, other); } @@ -1378,23 +1378,23 @@ namespace xsimd { static_assert(sizeof...(Vals) == 32, "Must contain as many uint8_t as can fit in avx register"); - if constexpr(detail::is_identity(mask)) + if constexpr (detail::is_identity(mask)) { return self; } constexpr auto lane_mask = mask % std::integral_constant(); - if constexpr(!detail::is_cross_lane(mask)) + if constexpr (!detail::is_cross_lane(mask)) { return _mm256_shuffle_epi8(self, lane_mask.as_batch()); } - if constexpr(detail::is_only_from_lo(mask)) + if constexpr (detail::is_only_from_lo(mask)) { __m256i broadcast = _mm256_permute2x128_si256(self, self, 0x00); // [low | low] return _mm256_shuffle_epi8(broadcast, lane_mask.as_batch()); } - if constexpr(detail::is_only_from_hi(mask)) + if constexpr (detail::is_only_from_hi(mask)) { __m256i broadcast = _mm256_permute2x128_si256(self, self, 0x11); // [high | high] return _mm256_shuffle_epi8(broadcast, lane_mask.as_batch()); @@ -1454,11 +1454,11 @@ namespace xsimd template XSIMD_INLINE batch swizzle(batch const& self, batch_constant mask, requires_arch) noexcept { - if constexpr(detail::is_identity(mask)) + if constexpr (detail::is_identity(mask)) { return self; } - if constexpr(!detail::is_cross_lane(mask)) + if constexpr (!detail::is_cross_lane(mask)) { constexpr auto lane_mask = mask % std::integral_constant(); // Cheaper intrinsics when not crossing lanes @@ -1479,11 +1479,11 @@ namespace xsimd template XSIMD_INLINE batch swizzle(batch const& self, batch_constant mask, requires_arch) noexcept { - if constexpr(detail::is_identity(mask)) + if constexpr (detail::is_identity(mask)) { return self; } - if constexpr(!detail::is_cross_lane(mask)) + if constexpr (!detail::is_cross_lane(mask)) { constexpr uint8_t lane_mask = (V0 % 2) | ((V1 % 2) << 1) | ((V2 % 2) << 2) | ((V3 % 2) << 3); // Cheaper intrinsics when not crossing lanes @@ -1504,25 +1504,25 @@ namespace xsimd template ::value>> XSIMD_INLINE batch zip_hi(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { auto lo = _mm256_unpacklo_epi8(self, other); auto hi = _mm256_unpackhi_epi8(self, other); return _mm256_permute2f128_si256(lo, hi, 0x31); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { auto lo = _mm256_unpacklo_epi16(self, other); auto hi = _mm256_unpackhi_epi16(self, other); return _mm256_permute2f128_si256(lo, hi, 0x31); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { auto lo = _mm256_unpacklo_epi32(self, other); auto hi = _mm256_unpackhi_epi32(self, other); return _mm256_permute2f128_si256(lo, hi, 0x31); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { auto lo = _mm256_unpacklo_epi64(self, other); auto hi = _mm256_unpackhi_epi64(self, other); @@ -1539,25 +1539,25 @@ namespace xsimd template ::value>> XSIMD_INLINE batch zip_lo(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { auto lo = _mm256_unpacklo_epi8(self, other); auto hi = _mm256_unpackhi_epi8(self, other); return _mm256_inserti128_si256(lo, _mm256_castsi256_si128(hi), 1); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { auto lo = _mm256_unpacklo_epi16(self, other); auto hi = _mm256_unpackhi_epi16(self, other); return _mm256_inserti128_si256(lo, _mm256_castsi256_si128(hi), 1); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { auto lo = _mm256_unpacklo_epi32(self, other); auto hi = _mm256_unpackhi_epi32(self, other); return _mm256_inserti128_si256(lo, _mm256_castsi256_si128(hi), 1); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { auto lo = _mm256_unpacklo_epi64(self, other); auto hi = _mm256_unpackhi_epi64(self, other); @@ -1577,9 +1577,9 @@ namespace xsimd __m128i x_lo = detail::lower_half(x); __m128i x_hi = detail::upper_half(x); __m256i lo, hi; - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { - if constexpr(std::is_signed::value) + if constexpr (std::is_signed::value) { lo = _mm256_cvtepi32_epi64(x_lo); hi = _mm256_cvtepi32_epi64(x_hi); @@ -1590,9 +1590,9 @@ namespace xsimd hi = _mm256_cvtepu32_epi64(x_hi); } } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { - if constexpr(std::is_signed::value) + if constexpr (std::is_signed::value) { lo = _mm256_cvtepi16_epi32(x_lo); hi = _mm256_cvtepi16_epi32(x_hi); @@ -1603,9 +1603,9 @@ namespace xsimd hi = _mm256_cvtepu16_epi32(x_hi); } } - else if constexpr(sizeof(T) == 1) + else if constexpr (sizeof(T) == 1) { - if constexpr(std::is_signed::value) + if constexpr (std::is_signed::value) { lo = _mm256_cvtepi8_epi16(x_lo); hi = _mm256_cvtepi8_epi16(x_hi); diff --git a/include/xsimd/arch/xsimd_avx2_128.hpp b/include/xsimd/arch/xsimd_avx2_128.hpp index 6f327ff09..167fbc9c5 100644 --- a/include/xsimd/arch/xsimd_avx2_128.hpp +++ b/include/xsimd/arch/xsimd_avx2_128.hpp @@ -48,7 +48,7 @@ namespace xsimd XSIMD_INLINE batch select(batch_bool_constant const&, batch const& true_br, batch const& false_br, requires_arch) noexcept { constexpr int mask = batch_bool_constant::mask(); - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm_blend_epi32(false_br, true_br, mask); } @@ -62,11 +62,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch bitwise_lshift(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm_sllv_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm_sllv_epi64(self, other); } @@ -82,7 +82,7 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm_srav_epi32(self, other); } @@ -93,11 +93,11 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm_srlv_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm_srlv_epi64(self, other); } @@ -117,7 +117,7 @@ namespace xsimd template XSIMD_INLINE __m128i maskload_avx2_128(T const* mem, __m128i mask) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm_maskload_epi32(reinterpret_cast(mem), mask); } @@ -130,7 +130,7 @@ namespace xsimd template XSIMD_INLINE void maskstore_avx2_128(T* mem, __m128i mask, __m128i src) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { _mm_maskstore_epi32(reinterpret_cast(mem), mask, src); } @@ -147,7 +147,7 @@ namespace xsimd typename = std::enable_if_t::value && (sizeof(T) == 4 || sizeof(T) == 8)>> XSIMD_INLINE batch load_masked(T const* mem, batch_bool_constant mask, convert, Mode, requires_arch) noexcept { - if constexpr(detail::lowers_to_plain_moves(mask)) + if constexpr (detail::lowers_to_plain_moves(mask)) { return detail::plain_move_load(mem, mask, convert {}, Mode {}); } @@ -161,7 +161,7 @@ namespace xsimd typename = std::enable_if_t::value && (sizeof(T) == 4 || sizeof(T) == 8)>> XSIMD_INLINE void store_masked(T* mem, batch const& src, batch_bool_constant mask, Mode, requires_arch) noexcept { - if constexpr(detail::lowers_to_plain_moves(mask)) + if constexpr (detail::lowers_to_plain_moves(mask)) { detail::plain_move_store(mem, src, mask, Mode {}); } diff --git a/include/xsimd/arch/xsimd_avx512bw.hpp b/include/xsimd/arch/xsimd_avx512bw.hpp index 266043a76..eba2a2012 100644 --- a/include/xsimd/arch/xsimd_avx512bw.hpp +++ b/include/xsimd/arch/xsimd_avx512bw.hpp @@ -32,38 +32,38 @@ namespace xsimd using register_type = typename batch_bool::register_type; if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return (register_type)_mm512_cmp_epi8_mask(self, other, Cmp); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return (register_type)_mm512_cmp_epi16_mask(self, other, Cmp); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return (register_type)_mm512_cmp_epi32_mask(self, other, Cmp); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return (register_type)_mm512_cmp_epi64_mask(self, other, Cmp); } } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return (register_type)_mm512_cmp_epu8_mask(self, other, Cmp); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return (register_type)_mm512_cmp_epu16_mask(self, other, Cmp); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return (register_type)_mm512_cmp_epu32_mask(self, other, Cmp); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return (register_type)_mm512_cmp_epu64_mask(self, other, Cmp); } @@ -80,11 +80,11 @@ namespace xsimd return self; } - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm512_abs_epi8(self); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm512_abs_epi16(self); } @@ -98,11 +98,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch add(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm512_add_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm512_add_epi16(self, other); } @@ -116,11 +116,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch avgr(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm512_avg_epu8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm512_avg_epu16(self, other); } @@ -134,12 +134,12 @@ namespace xsimd template ::value>> XSIMD_INLINE batch avg(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { auto adj = ((self ^ other) << 7) >> 7; return avgr(self, other, A {}) - adj; } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { auto adj = ((self ^ other) << 15) >> 15; return avgr(self, other, A {}) - adj; @@ -155,11 +155,11 @@ namespace xsimd XSIMD_INLINE batch bitwise_lshift(batch const& self, int32_t other, requires_arch) noexcept { #if defined(XSIMD_AVX512_SHIFT_INTRINSICS_IMM_ONLY) - if constexpr(sizeof(T) == 2) + if constexpr (sizeof(T) == 2) { return _mm512_sllv_epi16(self, _mm512_set1_epi16(other)); #else - if constexpr(sizeof(T) == 2) + if constexpr (sizeof(T) == 2) { return _mm512_slli_epi16(self, other); #endif @@ -176,7 +176,7 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { __m512i sign_mask = _mm512_set1_epi16((0xFF00 >> other) & 0x00FF); __m512i zeros = _mm512_setzero_si512(); @@ -190,12 +190,12 @@ namespace xsimd return _mm512_or_si512(cmp_sign_mask, _mm512_andnot_si512(sign_mask, res)); #if defined(XSIMD_AVX512_SHIFT_INTRINSICS_IMM_ONLY) } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm512_srav_epi16(self, _mm512_set1_epi16(other)); #else } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm512_srai_epi16(self, other); #endif @@ -208,11 +208,11 @@ namespace xsimd else { #if defined(XSIMD_AVX512_SHIFT_INTRINSICS_IMM_ONLY) - if constexpr(sizeof(T) == 2) + if constexpr (sizeof(T) == 2) { return _mm512_srlv_epi16(self, _mm512_set1_epi16(other)); #else - if constexpr(sizeof(T) == 2) + if constexpr (sizeof(T) == 2) { return _mm512_srli_epi16(self, other); #endif @@ -229,11 +229,11 @@ namespace xsimd XSIMD_INLINE batch decr_if(batch const& self, batch_bool const& mask, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm512_mask_sub_epi8(self, mask.data, self, _mm512_set1_epi8(1)); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm512_mask_sub_epi16(self, mask.data, self, _mm512_set1_epi16(1)); } @@ -269,11 +269,11 @@ namespace xsimd XSIMD_INLINE batch incr_if(batch const& self, batch_bool const& mask, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm512_mask_add_epi8(self, mask.data, self, _mm512_set1_epi8(1)); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm512_mask_add_epi16(self, mask.data, self, _mm512_set1_epi16(1)); } @@ -287,11 +287,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch insert(batch const& self, T val, index pos, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm512_mask_set1_epi8(self, __mmask64(1ULL << (I & 63)), val); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm512_mask_set1_epi16(self, __mmask32(1 << (I & 31)), val); } @@ -320,22 +320,22 @@ namespace xsimd XSIMD_INLINE batch_bool load_unaligned(bool const* mem, batch_bool, requires_arch) noexcept { using mask_type = typename batch_bool::register_type; - if constexpr(batch_bool::size == 64) + if constexpr (batch_bool::size == 64) { __m512i bool_val = _mm512_loadu_si512((__m512i const*)mem); return (mask_type)_mm512_cmpgt_epu8_mask(bool_val, _mm512_setzero_si512()); } - else if constexpr(batch_bool::size == 32) + else if constexpr (batch_bool::size == 32) { __m256i bpack = _mm256_loadu_si256((__m256i const*)mem); return (mask_type)_mm512_cmpgt_epu16_mask(_mm512_cvtepu8_epi16(bpack), _mm512_setzero_si512()); } - else if constexpr(batch_bool::size == 16) + else if constexpr (batch_bool::size == 16) { __m128i bpack = _mm_loadu_si128((__m128i const*)mem); return (mask_type)_mm512_cmpgt_epu32_mask(_mm512_cvtepu8_epi32(bpack), _mm512_setzero_si512()); } - else if constexpr(batch_bool::size == 8) + else if constexpr (batch_bool::size == 8) { __m128i bpack = _mm_loadl_epi64((__m128i const*)mem); return (mask_type)_mm512_cmpgt_epu64_mask(_mm512_cvtepu8_epi64(bpack), _mm512_setzero_si512()); @@ -351,22 +351,22 @@ namespace xsimd XSIMD_INLINE batch_bool load_aligned(bool const* mem, batch_bool, requires_arch) noexcept { using mask_type = typename batch_bool::register_type; - if constexpr(batch_bool::size == 64) + if constexpr (batch_bool::size == 64) { __m512i bool_val = _mm512_load_si512((__m512i const*)mem); return (mask_type)_mm512_cmpgt_epu8_mask(bool_val, _mm512_setzero_si512()); } - else if constexpr(batch_bool::size == 32) + else if constexpr (batch_bool::size == 32) { __m256i bpack = _mm256_load_si256((__m256i const*)mem); return (mask_type)_mm512_cmpgt_epu16_mask(_mm512_cvtepu8_epi16(bpack), _mm512_setzero_si512()); } - else if constexpr(batch_bool::size == 16) + else if constexpr (batch_bool::size == 16) { __m128i bpack = _mm_load_si128((__m128i const*)mem); return (mask_type)_mm512_cmpgt_epu32_mask(_mm512_cvtepu8_epi32(bpack), _mm512_setzero_si512()); } - else if constexpr(batch_bool::size == 8) + else if constexpr (batch_bool::size == 8) { __m128i bpack = _mm_loadl_epi64((__m128i const*)mem); return (mask_type)_mm512_cmpgt_epu64_mask(_mm512_cvtepu8_epi64(bpack), _mm512_setzero_si512()); @@ -385,7 +385,7 @@ namespace xsimd class = std::enable_if_t::value && (sizeof(T) == 1 || sizeof(T) == 2)>> XSIMD_INLINE batch load_masked(T const* mem, batch_bool mask, convert, Mode, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm512_maskz_loadu_epi8((__mmask64)mask.mask(), mem); } @@ -399,7 +399,7 @@ namespace xsimd class = std::enable_if_t::value && (sizeof(T) == 1 || sizeof(T) == 2)>> XSIMD_INLINE void store_masked(T* mem, batch const& src, batch_bool mask, Mode, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { _mm512_mask_storeu_epi8((void*)mem, (__mmask64)mask.mask(), src); } @@ -431,11 +431,11 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm512_max_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm512_max_epi16(self, other); } @@ -446,11 +446,11 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm512_max_epu8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm512_max_epu16(self, other); } @@ -467,11 +467,11 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm512_min_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm512_min_epi16(self, other); } @@ -482,11 +482,11 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm512_min_epu8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm512_min_epu16(self, other); } @@ -501,13 +501,13 @@ namespace xsimd template ::value>> XSIMD_INLINE batch mul(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { __m512i upper = _mm512_and_si512(_mm512_mullo_epi16(self, other), _mm512_srli_epi16(_mm512_set1_epi16(-1), 8)); __m512i lower = _mm512_slli_epi16(_mm512_mullo_epi16(_mm512_srli_epi16(self, 8), _mm512_srli_epi16(other, 8)), 8); return _mm512_or_si512(upper, lower); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm512_mullo_epi16(self, other); } @@ -567,11 +567,11 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm512_adds_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm512_adds_epi16(self, other); } @@ -582,11 +582,11 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm512_adds_epu8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm512_adds_epu16(self, other); } @@ -601,11 +601,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch select(batch_bool const& cond, batch const& true_br, batch const& false_br, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm512_mask_blend_epi8(cond, false_br.data, true_br.data); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm512_mask_blend_epi16(cond, false_br.data, true_br.data); } @@ -643,11 +643,11 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm512_subs_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm512_subs_epi16(self, other); } @@ -658,11 +658,11 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm512_subs_epu8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm512_subs_epu16(self, other); } @@ -687,11 +687,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch sub(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm512_sub_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm512_sub_epi16(self, other); } @@ -752,12 +752,12 @@ namespace xsimd XSIMD_INLINE batch zip_hi(batch const& self, batch const& other, requires_arch) noexcept { __m512i lo, hi; - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { lo = _mm512_unpacklo_epi8(self, other); hi = _mm512_unpackhi_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { lo = _mm512_unpacklo_epi16(self, other); hi = _mm512_unpackhi_epi16(self, other); @@ -780,12 +780,12 @@ namespace xsimd XSIMD_INLINE batch zip_lo(batch const& self, batch const& other, requires_arch) noexcept { __m512i lo, hi; - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { lo = _mm512_unpacklo_epi8(self, other); hi = _mm512_unpackhi_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { lo = _mm512_unpacklo_epi16(self, other); hi = _mm512_unpackhi_epi16(self, other); diff --git a/include/xsimd/arch/xsimd_avx512dq.hpp b/include/xsimd/arch/xsimd_avx512dq.hpp index fdcd7311d..81fa98642 100644 --- a/include/xsimd/arch/xsimd_avx512dq.hpp +++ b/include/xsimd/arch/xsimd_avx512dq.hpp @@ -25,7 +25,7 @@ namespace xsimd template XSIMD_INLINE batch load_masked(int32_t const* mem, batch_bool_constant mask, convert, Mode, requires_arch) noexcept { - if constexpr(mask.countr_zero() >= 8) + if constexpr (mask.countr_zero() >= 8) { constexpr auto mhi = ::xsimd::detail::upper_half(mask); const auto hi = load_masked(mem + 8, mhi, convert {}, Mode {}, avx2 {}); @@ -37,7 +37,7 @@ namespace xsimd template XSIMD_INLINE batch load_masked(float const* mem, batch_bool_constant mask, convert, Mode, requires_arch) noexcept { - if constexpr(mask.countr_zero() >= 8) + if constexpr (mask.countr_zero() >= 8) { constexpr auto mhi = ::xsimd::detail::upper_half(mask); const auto hi = load_masked(mem + 8, mhi, convert {}, Mode {}, avx2 {}); @@ -233,7 +233,7 @@ namespace xsimd constexpr bool dup_lo = detail::is_dup_lo(mask); constexpr bool dup_hi = detail::is_dup_hi(mask); - if constexpr(dup_lo || dup_hi) + if constexpr (dup_lo || dup_hi) { const batch half = _mm512_extractf32x8_ps(self, dup_lo ? 0 : 1); constexpr std::conditional_t, diff --git a/include/xsimd/arch/xsimd_avx512f.hpp b/include/xsimd/arch/xsimd_avx512f.hpp index f8ef4a495..e76b653c3 100644 --- a/include/xsimd/arch/xsimd_avx512f.hpp +++ b/include/xsimd/arch/xsimd_avx512f.hpp @@ -156,7 +156,7 @@ namespace xsimd using register_type = typename batch_bool::register_type; if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { // shifting to take sign into account uint64_t mask_low0 = _mm512_cmp_epi32_mask((batch(self.data) & batch(0x000000FF)) << 24, @@ -181,7 +181,7 @@ namespace xsimd } return (register_type)mask; } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { // shifting to take sign into account uint16_t mask_low = _mm512_cmp_epi32_mask((batch(self.data) & batch(0x0000FFFF)) << 16, @@ -192,18 +192,18 @@ namespace xsimd Cmp); return static_cast(morton(mask_low, mask_high)); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return (register_type)_mm512_cmp_epi32_mask(self, other, Cmp); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return (register_type)_mm512_cmp_epi64_mask(self, other, Cmp); } } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { uint64_t mask_low0 = _mm512_cmp_epu32_mask((batch(self.data) & batch(0x000000FF)), (batch(other.data) & batch(0x000000FF)), Cmp); uint64_t mask_low1 = _mm512_cmp_epu32_mask((batch(self.data) & batch(0x0000FF00)), (batch(other.data) & batch(0x0000FF00)), Cmp); @@ -219,17 +219,17 @@ namespace xsimd } return (register_type)mask; } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { uint16_t mask_low = _mm512_cmp_epu32_mask((batch(self.data) & batch(0x0000FFFF)), (batch(other.data) & batch(0x0000FFFF)), Cmp); uint16_t mask_high = _mm512_cmp_epu32_mask((batch(self.data) & batch(0xFFFF0000)), (batch(other.data) & batch(0xFFFF0000)), Cmp); return static_cast(morton(mask_low, mask_high)); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return (register_type)_mm512_cmp_epu32_mask(self, other, Cmp); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return (register_type)_mm512_cmp_epu64_mask(self, other, Cmp); } @@ -306,13 +306,13 @@ namespace xsimd { constexpr auto half = batch::size / 2; using half_arch = typename ::xsimd::make_sized_batch_t::arch_type; - if constexpr(mask.countl_zero() >= half) // lower 256-bit half + if constexpr (mask.countl_zero() >= half) // lower 256-bit half { constexpr auto mlo = ::xsimd::detail::lower_half(mask); const auto lo = load_masked(mem, mlo, convert {}, Mode {}, half_arch {}); return detail::load_masked(lo); // zero-extend low half } - else if constexpr(mask.countr_zero() >= half) // upper 256-bit half + else if constexpr (mask.countr_zero() >= half) // upper 256-bit half { constexpr auto mhi = ::xsimd::detail::upper_half(mask); const auto hi = load_masked(mem + half, mhi, convert {}, Mode {}, half_arch {}); @@ -335,13 +335,13 @@ namespace xsimd constexpr auto half = batch::size / 2; using half_batch = ::xsimd::make_sized_batch_t; using half_arch = typename half_batch::arch_type; - if constexpr(mask.countl_zero() >= half) // lower 256-bit half + if constexpr (mask.countl_zero() >= half) // lower 256-bit half { constexpr auto mlo = ::xsimd::detail::lower_half(mask); const half_batch lo = detail::lower_half(src); store_masked(mem, lo, mlo, Mode {}, half_arch {}); } - else if constexpr(mask.countr_zero() >= half) // upper 256-bit half + else if constexpr (mask.countr_zero() >= half) // upper 256-bit half { constexpr auto mhi = ::xsimd::detail::upper_half(mask); const half_batch hi = detail::upper_half(src); @@ -398,23 +398,23 @@ namespace xsimd return self; } - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return detail::fwd_to_avx([](__m256i s) noexcept { return abs(batch(s)); }, self); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return detail::fwd_to_avx([](__m256i s) noexcept { return abs(batch(s)); }, self); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm512_abs_epi32(self); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm512_abs_epi64(self); } @@ -429,23 +429,23 @@ namespace xsimd template ::value>> XSIMD_INLINE batch add(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return detail::fwd_to_avx([](__m256i s, __m256i o) noexcept { return add(batch(s), batch(o)); }, self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return detail::fwd_to_avx([](__m256i s, __m256i o) noexcept { return add(batch(s), batch(o)); }, self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm512_add_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm512_add_epi64(self, other); } @@ -547,7 +547,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch bitwise_lshift(batch const& self, int32_t other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { #if defined(XSIMD_AVX512_SHIFT_INTRINSICS_IMM_ONLY) __m512i tmp = _mm512_sllv_epi32(self, _mm512_set1_epi32(other)); @@ -556,27 +556,27 @@ namespace xsimd #endif return _mm512_and_si512(_mm512_set1_epi8(0xFF << other), tmp); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return detail::fwd_to_avx([](__m256i s, int32_t o) noexcept { return bitwise_lshift(batch(s), o, avx2 {}); }, self, other); #if defined(XSIMD_AVX512_SHIFT_INTRINSICS_IMM_ONLY) } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm512_sllv_epi32(self, _mm512_set1_epi32(other)); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm512_sllv_epi64(self, _mm512_set1_epi64(other)); #else } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm512_slli_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm512_slli_epi64(self, other); #endif @@ -644,19 +644,19 @@ namespace xsimd if (std::is_signed::value) { #if defined(XSIMD_AVX512_SHIFT_INTRINSICS_IMM_ONLY) - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm512_srav_epi32(self, _mm512_set1_epi32(other)); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm512_srav_epi64(self, _mm512_set1_epi64(other)); #else - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm512_srai_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm512_srai_epi64(self, other); #endif @@ -670,7 +670,7 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { #if defined(XSIMD_AVX512_SHIFT_INTRINSICS_IMM_ONLY) __m512i tmp = _mm512_srlv_epi32(self, _mm512_set1_epi32(other)); @@ -680,20 +680,20 @@ namespace xsimd return _mm512_and_si512(_mm512_set1_epi8(0xFF >> other), tmp); #if defined(XSIMD_AVX512_SHIFT_INTRINSICS_IMM_ONLY) } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm512_srlv_epi32(self, _mm512_set1_epi32(other)); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm512_srlv_epi64(self, _mm512_set1_epi64(other)); #else } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm512_srli_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm512_srli_epi64(self, other); #endif @@ -711,11 +711,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch rotl(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm512_rolv_epi32(self, other); } - if constexpr(sizeof(T) == 8) + if constexpr (sizeof(T) == 8) { return _mm512_rolv_epi64(self, other); } @@ -733,11 +733,11 @@ namespace xsimd { constexpr auto bits = std::numeric_limits::digits + std::numeric_limits::is_signed; static_assert(count < bits, "Count must be less than the number of bits in T"); - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm512_rol_epi32(self, count); } - if constexpr(sizeof(T) == 8) + if constexpr (sizeof(T) == 8) { return _mm512_rol_epi64(self, count); } @@ -751,19 +751,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch rotr(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) < 4) + if constexpr (sizeof(T) < 4) { return detail::fwd_to_avx([](__m256i s, __m256i o) noexcept { return rotr(batch(s), batch(o), avx2 {}); }, self, other); } - if constexpr(std::is_unsigned::value) + if constexpr (std::is_unsigned::value) { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm512_rorv_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm512_rorv_epi64(self, other); } @@ -781,19 +781,19 @@ namespace xsimd { constexpr auto bits = std::numeric_limits::digits + std::numeric_limits::is_signed; static_assert(count < bits, "Count must be less than the number of bits in T"); - if constexpr(sizeof(T) < 4) + if constexpr (sizeof(T) < 4) { return detail::fwd_to_avx([](__m256i s) noexcept { return rotr(batch(s), avx2 {}); }, self); } - if constexpr(std::is_unsigned::value) + if constexpr (std::is_unsigned::value) { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm512_ror_epi32(self, count); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm512_ror_epi64(self, count); } @@ -867,19 +867,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch broadcast(T val, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm512_set1_epi8(val); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm512_set1_epi16(val); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm512_set1_epi32(val); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm512_set1_epi64(val); } @@ -1007,11 +1007,11 @@ namespace xsimd XSIMD_INLINE batch decr_if(batch const& self, batch_bool const& mask, requires_arch) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm512_mask_sub_epi32(self, mask.data, self, _mm512_set1_epi32(1)); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm512_mask_sub_epi64(self, mask.data, self, _mm512_set1_epi64(1)); } @@ -1353,11 +1353,11 @@ namespace xsimd XSIMD_INLINE batch incr_if(batch const& self, batch_bool const& mask, requires_arch) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm512_mask_add_epi32(self, mask.data, self, _mm512_set1_epi32(1)); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm512_mask_add_epi64(self, mask.data, self, _mm512_set1_epi64(1)); } @@ -1383,19 +1383,19 @@ namespace xsimd template ::value>> XSIMD_INLINE T first(batch const& self, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return static_cast(_mm_cvtsi128_si32(_mm512_castsi512_si128(self)) & 0xFF); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return static_cast(_mm_cvtsi128_si32(_mm512_castsi512_si128(self)) & 0xFFFF); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return static_cast(_mm_cvtsi128_si32(_mm512_castsi512_si128(self))); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { batch low = _mm512_castsi512_si128(self); return first(low, sse4_2 {}); @@ -1411,7 +1411,7 @@ namespace xsimd template XSIMD_INLINE float get(batch const& self, ::xsimd::index, requires_arch) noexcept { - if constexpr(I == 0) + if constexpr (I == 0) { return first(self, avx512f {}); } @@ -1422,7 +1422,7 @@ namespace xsimd template XSIMD_INLINE double get(batch const& self, ::xsimd::index, requires_arch) noexcept { - if constexpr(I == 0) + if constexpr (I == 0) { return first(self, avx512f {}); } @@ -1433,16 +1433,16 @@ namespace xsimd template ::value>> XSIMD_INLINE T get(batch const& self, ::xsimd::index, requires_arch) noexcept { - if constexpr(I == 0) + if constexpr (I == 0) { return first(self, avx512f {}); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { const auto rotated = _mm512_alignr_epi32(self, self, I); return first(batch(_mm512_castsi512_si128(rotated)), sse4_2 {}); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { const auto rotated = _mm512_alignr_epi64(self, self, I); return first(batch(_mm512_castsi512_si128(rotated)), sse4_2 {}); @@ -1476,11 +1476,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch insert(batch const& self, T val, index pos, requires_arch) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm512_mask_set1_epi32(self, __mmask16(1 << (I & 15)), val); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm512_mask_set1_epi64(self, __mmask8(1 << (I & 7)), val); } @@ -1543,7 +1543,7 @@ namespace xsimd XSIMD_INLINE unsigned char tobitset(unsigned char unpacked[N]) { static_assert(N == 8 || N == 4 || N == 2, "valid pack size"); - if constexpr(N == 8) + if constexpr (N == 8) { uint64_t data; memcpy(&data, unpacked, sizeof(uint64_t)); @@ -1553,7 +1553,7 @@ namespace xsimd unsigned char res = ((data * magic) >> 56) & 0xFF; return res; } - else if constexpr(N == 4) + else if constexpr (N == 4) { uint32_t data; memcpy(&data, unpacked, sizeof(uint32_t)); @@ -1563,7 +1563,7 @@ namespace xsimd unsigned char res = ((data * magic) >> 24) & 0xFF; return res; } - else if constexpr(N == 2) + else if constexpr (N == 2) { uint16_t data; memcpy(&data, unpacked, sizeof(uint16_t)); @@ -1708,11 +1708,11 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm512_max_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm512_max_epi64(self, other); } @@ -1725,11 +1725,11 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm512_max_epu32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm512_max_epu64(self, other); } @@ -1758,11 +1758,11 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm512_min_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm512_min_epi64(self, other); } @@ -1775,11 +1775,11 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm512_min_epu32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm512_min_epu64(self, other); } @@ -1806,7 +1806,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch mul(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm512_mullo_epi32(self, other); } @@ -1986,11 +1986,11 @@ namespace xsimd template ::value>> XSIMD_INLINE T reduce_mul(batch const& self, requires_arch) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm512_reduce_mul_epi32(self); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm512_reduce_mul_epi64(self); } @@ -2083,7 +2083,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch select(batch_bool const& cond, batch const& true_br, batch const& false_br, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { alignas(avx2::alignment()) uint8_t buffer[64]; // FIXME: ultra inefficient @@ -2099,7 +2099,7 @@ namespace xsimd __m256i res_hi = select(batch_bool(cond_hi), batch(true_hi), batch(false_hi), avx2 {}); return detail::merge_avx(res_low, res_hi); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { __m256i cond_low = _mm512_maskz_cvtepi32_epi16((uint64_t)cond.data & 0xFFFF, _mm512_set1_epi32(~0)); __m256i cond_hi = _mm512_maskz_cvtepi32_epi16((uint64_t)cond.data >> 16, _mm512_set1_epi32(~0)); @@ -2111,11 +2111,11 @@ namespace xsimd __m256i res_hi = select(batch_bool(cond_hi), batch(true_hi), batch(false_hi), avx2 {}); return detail::merge_avx(res_low, res_hi); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm512_mask_blend_epi32(cond, false_br, true_br); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm512_mask_blend_epi64(cond, false_br, true_br); } @@ -2505,23 +2505,23 @@ namespace xsimd template ::value>> XSIMD_INLINE batch sub(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return detail::fwd_to_avx([](__m256i s, __m256i o) noexcept { return sub(batch(s), batch(o)); }, self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return detail::fwd_to_avx([](__m256i s, __m256i o) noexcept { return sub(batch(s), batch(o)); }, self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm512_sub_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm512_sub_epi64(self, other); } @@ -2585,17 +2585,17 @@ namespace xsimd batch_constant mask, requires_arch) noexcept { - if constexpr(detail::is_identity(mask)) + if constexpr (detail::is_identity(mask)) { return self; } - if constexpr(!detail::is_cross_lane(mask)) + if constexpr (!detail::is_cross_lane(mask)) { constexpr int imm0 = detail::mod_shuffle(V0, V1, V2, V3); constexpr int imm1 = detail::mod_shuffle(V4, V5, V6, V7); constexpr int imm2 = detail::mod_shuffle(V8, V9, V10, V11); constexpr int imm3 = detail::mod_shuffle(V12, V13, V14, V15); - if constexpr(imm0 == imm1 && imm0 == imm2 && imm0 == imm3) + if constexpr (imm0 == imm1 && imm0 == imm2 && imm0 == imm3) { return _mm512_permute_ps(self, imm0); } @@ -2607,18 +2607,18 @@ namespace xsimd batch_constant mask, requires_arch) noexcept { - if constexpr(detail::is_identity(mask)) + if constexpr (detail::is_identity(mask)) { return self; } - if constexpr(!detail::is_cross_lane(mask)) + if constexpr (!detail::is_cross_lane(mask)) { constexpr auto imm = ((V0 & 1) << 0) | ((V1 & 1) << 1) | ((V2 & 1) << 2) | ((V3 & 1) << 3) | ((V4 & 1) << 4) | ((V5 & 1) << 5) | ((V6 & 1) << 6) | ((V7 & 1) << 7); return _mm512_permute_pd(self, imm); } constexpr bool dup_lo = detail::is_dup_lo(mask); constexpr bool dup_hi = detail::is_dup_hi(mask); - if constexpr(dup_lo || dup_hi) + if constexpr (dup_lo || dup_hi) { const batch half = _mm512_extractf64x4_pd(self, dup_lo ? 0 : 1); constexpr std::conditional_t, @@ -2700,12 +2700,12 @@ namespace xsimd template XSIMD_INLINE batch swizzle(batch const& self, batch_constant mask, requires_arch) noexcept { - if constexpr(detail::is_pair_of_contiguous_indices::value) + if constexpr (detail::is_pair_of_contiguous_indices::value) { constexpr typename detail::fold_batch_constant::type mask32; return _mm512_permutexvar_epi32(static_cast>(mask32), self); } - else if constexpr(detail::is_reduce_pattern()) + else if constexpr (detail::is_reduce_pattern()) { // FIXME: this sequence is very inefficient, but it's here to catch // a pattern generated by detail::reduce from xsimd_common_math.hpp. @@ -2901,23 +2901,23 @@ namespace xsimd XSIMD_INLINE batch zip_hi(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { assert(false && "not implemented yet"); return {}; } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { assert(false && "not implemented yet"); return {}; } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { __m512i idx = _mm512_setr_epi32(8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31); return _mm512_permutex2var_epi32(self, idx, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { __m512i idx = _mm512_setr_epi64(4, 12, 5, 13, 6, 14, 7, 15); return _mm512_permutex2var_epi64(self, idx, other); @@ -2950,23 +2950,23 @@ namespace xsimd XSIMD_INLINE batch zip_lo(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { assert(false && "not implemented yet"); return {}; } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { assert(false && "not implemented yet"); return {}; } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { __m512i idx = _mm512_setr_epi32(0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23); return _mm512_permutex2var_epi32(self, idx, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { __m512i idx = _mm512_setr_epi64(0, 8, 1, 9, 2, 10, 3, 11); return _mm512_permutex2var_epi64(self, idx, other); @@ -3000,9 +3000,9 @@ namespace xsimd __m256i x_lo = detail::lower_half(x); __m256i x_hi = detail::upper_half(x); __m512i lo, hi; - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { - if constexpr(std::is_signed::value) + if constexpr (std::is_signed::value) { lo = _mm512_cvtepi32_epi64(x_lo); hi = _mm512_cvtepi32_epi64(x_hi); @@ -3013,9 +3013,9 @@ namespace xsimd hi = _mm512_cvtepu32_epi64(x_hi); } } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { - if constexpr(std::is_signed::value) + if constexpr (std::is_signed::value) { lo = _mm512_cvtepi16_epi32(x_lo); hi = _mm512_cvtepi16_epi32(x_hi); @@ -3026,7 +3026,7 @@ namespace xsimd hi = _mm512_cvtepu16_epi32(x_hi); } } - else if constexpr(sizeof(T) == 1) + else if constexpr (sizeof(T) == 1) { auto pair_lo = widen(batch(x_lo), avx2 {}); auto pair_hi = widen(batch(x_hi), avx2 {}); diff --git a/include/xsimd/arch/xsimd_avx512vbmi2.hpp b/include/xsimd/arch/xsimd_avx512vbmi2.hpp index 887e7324f..c3f7165ae 100644 --- a/include/xsimd/arch/xsimd_avx512vbmi2.hpp +++ b/include/xsimd/arch/xsimd_avx512vbmi2.hpp @@ -71,7 +71,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch rotl(batch const& self, int32_t other, requires_arch) noexcept { - if constexpr(sizeof(T) == 2) + if constexpr (sizeof(T) == 2) { return _mm512_shldv_epi16(self, self, _mm512_set1_epi16(static_cast(other))); } @@ -86,7 +86,7 @@ namespace xsimd { constexpr auto bits = std::numeric_limits::digits + std::numeric_limits::is_signed; static_assert(count < bits, "Count must be less than the number of bits in T"); - if constexpr(sizeof(T) == 2) + if constexpr (sizeof(T) == 2) { return _mm512_shldi_epi16(self, self, count); } @@ -100,7 +100,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch rotr(batch const& self, int32_t other, requires_arch) noexcept { - if constexpr(sizeof(T) == 2) + if constexpr (sizeof(T) == 2) { return _mm512_shrdv_epi16(self, self, _mm512_set1_epi16(static_cast(other))); } @@ -115,7 +115,7 @@ namespace xsimd { constexpr auto bits = std::numeric_limits::digits + std::numeric_limits::is_signed; static_assert(count < bits, "count must be less than the number of bits in T"); - if constexpr(sizeof(T) == 2) + if constexpr (sizeof(T) == 2) { return _mm512_shrdi_epi16(self, self, count); } diff --git a/include/xsimd/arch/xsimd_avx512vl_128.hpp b/include/xsimd/arch/xsimd_avx512vl_128.hpp index 3a604c88f..e6eb00356 100644 --- a/include/xsimd/arch/xsimd_avx512vl_128.hpp +++ b/include/xsimd/arch/xsimd_avx512vl_128.hpp @@ -40,7 +40,7 @@ namespace xsimd using register_type = typename batch_bool::register_type; if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { // shifting to take sign into account uint64_t mask_low0 = _mm_cmp_epi32_mask((batch(self.data) & batch(0x000000FF)) << 24, @@ -65,7 +65,7 @@ namespace xsimd } return (register_type)mask; } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { // shifting to take sign into account uint16_t mask_low = _mm_cmp_epi32_mask((batch(self.data) & batch(0x0000FFFF)) << 16, @@ -76,18 +76,18 @@ namespace xsimd Cmp); return static_cast(morton(mask_low, mask_high)); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return (register_type)_mm_cmp_epi32_mask(self, other, Cmp); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return (register_type)_mm_cmp_epi64_mask(self, other, Cmp); } } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { uint64_t mask_low0 = _mm_cmp_epu32_mask((batch(self.data) & batch(0x000000FF)), (batch(other.data) & batch(0x000000FF)), Cmp); uint64_t mask_low1 = _mm_cmp_epu32_mask((batch(self.data) & batch(0x0000FF00)), (batch(other.data) & batch(0x0000FF00)), Cmp); @@ -103,17 +103,17 @@ namespace xsimd } return (register_type)mask; } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { uint16_t mask_low = _mm_cmp_epu32_mask((batch(self.data) & batch(0x0000FFFF)), (batch(other.data) & batch(0x0000FFFF)), Cmp); uint16_t mask_high = _mm_cmp_epu32_mask((batch(self.data) & batch(0xFFFF0000)), (batch(other.data) & batch(0xFFFF0000)), Cmp); return static_cast(morton(mask_low, mask_high)); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return (register_type)_mm_cmp_epu32_mask(self, other, Cmp); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return (register_type)_mm_cmp_epu64_mask(self, other, Cmp); } @@ -211,7 +211,7 @@ namespace xsimd template = 0> XSIMD_INLINE __m128i maskload128(T const* mem, uint64_t m, Mode) noexcept { - if constexpr(std::is_same::value) + if constexpr (std::is_same::value) { return _mm_maskz_load_epi32((__mmask8)m, mem); } @@ -223,7 +223,7 @@ namespace xsimd template = 0> XSIMD_INLINE __m128i maskload128(T const* mem, uint64_t m, Mode) noexcept { - if constexpr(std::is_same::value) + if constexpr (std::is_same::value) { return _mm_maskz_load_epi64((__mmask8)m, mem); } @@ -235,7 +235,7 @@ namespace xsimd template XSIMD_INLINE __m128 maskload128(float const* mem, uint64_t m, Mode) noexcept { - if constexpr(std::is_same::value) + if constexpr (std::is_same::value) { return _mm_maskz_load_ps((__mmask8)m, mem); } @@ -247,7 +247,7 @@ namespace xsimd template XSIMD_INLINE __m128d maskload128(double const* mem, uint64_t m, Mode) noexcept { - if constexpr(std::is_same::value) + if constexpr (std::is_same::value) { return _mm_maskz_load_pd((__mmask8)m, mem); } @@ -260,7 +260,7 @@ namespace xsimd template = 0> XSIMD_INLINE void maskstore128(T* mem, __m128i src, uint64_t m, Mode) noexcept { - if constexpr(std::is_same::value) + if constexpr (std::is_same::value) { _mm_mask_store_epi32(mem, (__mmask8)m, src); } @@ -272,7 +272,7 @@ namespace xsimd template = 0> XSIMD_INLINE void maskstore128(T* mem, __m128i src, uint64_t m, Mode) noexcept { - if constexpr(std::is_same::value) + if constexpr (std::is_same::value) { _mm_mask_store_epi64(mem, (__mmask8)m, src); } @@ -284,7 +284,7 @@ namespace xsimd template XSIMD_INLINE void maskstore128(float* mem, __m128 src, uint64_t m, Mode) noexcept { - if constexpr(std::is_same::value) + if constexpr (std::is_same::value) { _mm_mask_store_ps(mem, (__mmask8)m, src); } @@ -296,7 +296,7 @@ namespace xsimd template XSIMD_INLINE void maskstore128(double* mem, __m128d src, uint64_t m, Mode) noexcept { - if constexpr(std::is_same::value) + if constexpr (std::is_same::value) { _mm_mask_store_pd(mem, (__mmask8)m, src); } @@ -313,7 +313,7 @@ namespace xsimd typename> XSIMD_INLINE batch load_masked(T const* mem, batch_bool_constant mask, convert, Mode, requires_arch) noexcept { - if constexpr(detail::lowers_to_plain_moves(mask)) + if constexpr (detail::lowers_to_plain_moves(mask)) { return detail::plain_move_load(mem, mask, convert {}, Mode {}); } @@ -334,7 +334,7 @@ namespace xsimd typename> XSIMD_INLINE void store_masked(T* mem, batch const& src, batch_bool_constant mask, Mode, requires_arch) noexcept { - if constexpr(detail::lowers_to_plain_moves(mask)) + if constexpr (detail::lowers_to_plain_moves(mask)) { detail::plain_move_store(mem, src, mask, Mode {}); } @@ -460,11 +460,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch insert(batch const& self, T val, index pos, requires_arch) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm_mask_set1_epi32(self, __mmask8(1 << (I & 7)), val); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm_mask_set1_epi64(self, __mmask8(1 << (I & 3)), val); } @@ -492,7 +492,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch bitwise_rshift(batch const& self, int32_t other, requires_arch) noexcept { - if constexpr(std::is_signed::value && sizeof(T) == 8) + if constexpr (std::is_signed::value && sizeof(T) == 8) { return _mm_srai_epi64(self, other); } @@ -506,7 +506,7 @@ namespace xsimd { constexpr auto bits = std::numeric_limits::digits + std::numeric_limits::is_signed; static_assert(shift < bits, "Shift amount must be less than the number of bits in T"); - if constexpr(std::is_signed::value && sizeof(T) == 8) + if constexpr (std::is_signed::value && sizeof(T) == 8) { return _mm_srai_epi64(self, shift); } @@ -518,7 +518,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch bitwise_rshift(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(std::is_signed::value && sizeof(T) == 8) + if constexpr (std::is_signed::value && sizeof(T) == 8) { return _mm_srav_epi64(self, other); } @@ -532,11 +532,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch rotl(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm_rolv_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm_rolv_epi64(self, other); } @@ -555,11 +555,11 @@ namespace xsimd { constexpr auto bits = std::numeric_limits::digits + std::numeric_limits::is_signed; static_assert(count < bits, "Count must be less than the number of bits in T"); - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm_rol_epi32(self, count); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm_rol_epi64(self, count); } @@ -573,11 +573,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch rotr(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm_rorv_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm_rorv_epi64(self, other); } @@ -597,11 +597,11 @@ namespace xsimd { constexpr auto bits = std::numeric_limits::digits + std::numeric_limits::is_signed; static_assert(count < bits, "Count must be less than the number of bits in T"); - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm_ror_epi32(self, count); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm_ror_epi64(self, count); } @@ -827,21 +827,21 @@ namespace xsimd template ::value>> XSIMD_INLINE batch select(batch_bool const& cond, batch const& true_br, batch const& false_br, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { batch_bool batch_cond = batch_bool::from_mask(cond.mask()); return _mm_blendv_epi8(false_br, true_br, batch_cond); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { batch_bool batch_cond = batch_bool::from_mask(cond.mask()); return _mm_blendv_epi8(false_br, true_br, batch_cond); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm_mask_blend_epi32(cond, false_br, true_br); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm_mask_blend_epi64(cond, false_br, true_br); } diff --git a/include/xsimd/arch/xsimd_avx512vl_256.hpp b/include/xsimd/arch/xsimd_avx512vl_256.hpp index cb37650c0..da4e9d9c7 100644 --- a/include/xsimd/arch/xsimd_avx512vl_256.hpp +++ b/include/xsimd/arch/xsimd_avx512vl_256.hpp @@ -40,7 +40,7 @@ namespace xsimd using register_type = typename batch_bool::register_type; if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { // shifting to take sign into account uint64_t mask_low0 = _mm256_cmp_epi32_mask((batch(self.data) & batch(0x000000FF)) << 24, @@ -65,7 +65,7 @@ namespace xsimd } return (register_type)mask; } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { // shifting to take sign into account uint16_t mask_low = _mm256_cmp_epi32_mask((batch(self.data) & batch(0x0000FFFF)) << 16, @@ -76,18 +76,18 @@ namespace xsimd Cmp); return static_cast(morton(mask_low, mask_high)); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return (register_type)_mm256_cmp_epi32_mask(self, other, Cmp); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return (register_type)_mm256_cmp_epi64_mask(self, other, Cmp); } } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { uint64_t mask_low0 = _mm256_cmp_epu32_mask((batch(self.data) & batch(0x000000FF)), (batch(other.data) & batch(0x000000FF)), Cmp); uint64_t mask_low1 = _mm256_cmp_epu32_mask((batch(self.data) & batch(0x0000FF00)), (batch(other.data) & batch(0x0000FF00)), Cmp); @@ -103,17 +103,17 @@ namespace xsimd } return (register_type)mask; } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { uint16_t mask_low = _mm256_cmp_epu32_mask((batch(self.data) & batch(0x0000FFFF)), (batch(other.data) & batch(0x0000FFFF)), Cmp); uint16_t mask_high = _mm256_cmp_epu32_mask((batch(self.data) & batch(0xFFFF0000)), (batch(other.data) & batch(0xFFFF0000)), Cmp); return static_cast(morton(mask_low, mask_high)); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return (register_type)_mm256_cmp_epu32_mask(self, other, Cmp); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return (register_type)_mm256_cmp_epu64_mask(self, other, Cmp); } @@ -210,7 +210,7 @@ namespace xsimd template = 0> XSIMD_INLINE __m256i maskload256(T const* mem, uint64_t m, Mode) noexcept { - if constexpr(std::is_same::value) + if constexpr (std::is_same::value) { return _mm256_maskz_load_epi32((__mmask8)m, mem); } @@ -222,7 +222,7 @@ namespace xsimd template = 0> XSIMD_INLINE __m256i maskload256(T const* mem, uint64_t m, Mode) noexcept { - if constexpr(std::is_same::value) + if constexpr (std::is_same::value) { return _mm256_maskz_load_epi64((__mmask8)m, mem); } @@ -234,7 +234,7 @@ namespace xsimd template XSIMD_INLINE __m256 maskload256(float const* mem, uint64_t m, Mode) noexcept { - if constexpr(std::is_same::value) + if constexpr (std::is_same::value) { return _mm256_maskz_load_ps((__mmask8)m, mem); } @@ -246,7 +246,7 @@ namespace xsimd template XSIMD_INLINE __m256d maskload256(double const* mem, uint64_t m, Mode) noexcept { - if constexpr(std::is_same::value) + if constexpr (std::is_same::value) { return _mm256_maskz_load_pd((__mmask8)m, mem); } @@ -259,7 +259,7 @@ namespace xsimd template = 0> XSIMD_INLINE void maskstore256(T* mem, __m256i src, uint64_t m, Mode) noexcept { - if constexpr(std::is_same::value) + if constexpr (std::is_same::value) { _mm256_mask_store_epi32(mem, (__mmask8)m, src); } @@ -271,7 +271,7 @@ namespace xsimd template = 0> XSIMD_INLINE void maskstore256(T* mem, __m256i src, uint64_t m, Mode) noexcept { - if constexpr(std::is_same::value) + if constexpr (std::is_same::value) { _mm256_mask_store_epi64(mem, (__mmask8)m, src); } @@ -283,7 +283,7 @@ namespace xsimd template XSIMD_INLINE void maskstore256(float* mem, __m256 src, uint64_t m, Mode) noexcept { - if constexpr(std::is_same::value) + if constexpr (std::is_same::value) { _mm256_mask_store_ps(mem, (__mmask8)m, src); } @@ -295,7 +295,7 @@ namespace xsimd template XSIMD_INLINE void maskstore256(double* mem, __m256d src, uint64_t m, Mode) noexcept { - if constexpr(std::is_same::value) + if constexpr (std::is_same::value) { _mm256_mask_store_pd(mem, (__mmask8)m, src); } @@ -313,11 +313,11 @@ namespace xsimd XSIMD_INLINE batch load_masked(T const* mem, batch_bool_constant mask, convert, Mode, requires_arch) noexcept { // all() reaches here only via the avx512f half-split cascade. - if constexpr(mask.all()) + if constexpr (mask.all()) { return batch::load(mem, Mode {}); } - else if constexpr(detail::lowers_to_plain_moves(mask)) + else if constexpr (detail::lowers_to_plain_moves(mask)) { return detail::plain_move_load(mem, mask, convert {}, Mode {}); } @@ -338,11 +338,11 @@ namespace xsimd typename = std::enable_if_t::value && (sizeof(T) == 4 || sizeof(T) == 8)>> XSIMD_INLINE void store_masked(T* mem, batch const& src, batch_bool_constant mask, Mode, requires_arch) noexcept { - if constexpr(mask.all()) + if constexpr (mask.all()) { src.store(mem, Mode {}); } - else if constexpr(detail::lowers_to_plain_moves(mask)) + else if constexpr (detail::lowers_to_plain_moves(mask)) { detail::plain_move_store(mem, src, mask, Mode {}); } @@ -559,11 +559,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch insert(batch const& self, T val, index pos, requires_arch) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm256_mask_set1_epi32(self, __mmask8(1 << (I & 7)), val); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm256_mask_set1_epi64(self, __mmask8(1 << (I & 3)), val); } @@ -591,7 +591,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch bitwise_rshift(batch const& self, int32_t other, requires_arch) noexcept { - if constexpr(std::is_signed::value && sizeof(T) == 8) + if constexpr (std::is_signed::value && sizeof(T) == 8) { return _mm256_srai_epi64(self, other); } @@ -605,7 +605,7 @@ namespace xsimd { constexpr auto bits = std::numeric_limits::digits + std::numeric_limits::is_signed; static_assert(shift < bits, "Shift amount must be less than the number of bits in T"); - if constexpr(std::is_signed::value && sizeof(T) == 8) + if constexpr (std::is_signed::value && sizeof(T) == 8) { return _mm256_srai_epi64(self, shift); } @@ -617,7 +617,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch bitwise_rshift(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(std::is_signed::value && sizeof(T) == 8) + if constexpr (std::is_signed::value && sizeof(T) == 8) { return _mm256_srav_epi64(self, other); } @@ -631,11 +631,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch rotl(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm256_rolv_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm256_rolv_epi64(self, other); } @@ -654,11 +654,11 @@ namespace xsimd { constexpr auto bits = std::numeric_limits::digits + std::numeric_limits::is_signed; static_assert(count < bits, "Count must be less than the number of bits in T"); - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm256_rol_epi32(self, count); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm256_rol_epi64(self, count); } @@ -672,11 +672,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch rotr(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm256_rorv_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm256_rorv_epi64(self, other); } @@ -696,11 +696,11 @@ namespace xsimd { constexpr auto bits = std::numeric_limits::digits + std::numeric_limits::is_signed; static_assert(count < bits, "Count must be less than the number of bits in T"); - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return _mm256_ror_epi32(self, count); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm256_ror_epi64(self, count); } @@ -926,21 +926,21 @@ namespace xsimd template ::value>> XSIMD_INLINE batch select(batch_bool const& cond, batch const& true_br, batch const& false_br, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { batch_bool batch_cond = batch_bool::from_mask(cond.mask()); return _mm256_blendv_epi8(false_br, true_br, batch_cond); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { batch_bool batch_cond = batch_bool::from_mask(cond.mask()); return _mm256_blendv_epi8(false_br, true_br, batch_cond); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm256_mask_blend_epi32(cond, false_br, true_br); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm256_mask_blend_epi64(cond, false_br, true_br); } diff --git a/include/xsimd/arch/xsimd_avx_128.hpp b/include/xsimd/arch/xsimd_avx_128.hpp index 1d2ab1c43..4877b4ba5 100644 --- a/include/xsimd/arch/xsimd_avx_128.hpp +++ b/include/xsimd/arch/xsimd_avx_128.hpp @@ -108,7 +108,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch load_masked(T const* mem, batch_bool_constant mask, convert, Mode, requires_arch) noexcept { - if constexpr(detail::lowers_to_plain_moves(mask)) + if constexpr (detail::lowers_to_plain_moves(mask)) { return load_masked(mem, mask, convert {}, Mode {}, sse2 {}); } @@ -137,7 +137,7 @@ namespace xsimd XSIMD_INLINE std::enable_if_t::value && (sizeof(T) == 4 || sizeof(T) == 8), batch> load_masked(T const* mem, batch_bool mask, convert, Mode, requires_arch) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { return bitwise_cast(batch(_mm_maskload_ps(reinterpret_cast(mem), __m128i(mask)))); } @@ -150,7 +150,7 @@ namespace xsimd template ::value>> XSIMD_INLINE void store_masked(T* mem, batch const& src, batch_bool_constant mask, Mode, requires_arch) noexcept { - if constexpr(detail::lowers_to_plain_moves(mask)) + if constexpr (detail::lowers_to_plain_moves(mask)) { store_masked(mem, src, mask, Mode {}, sse2 {}); } @@ -179,7 +179,7 @@ namespace xsimd XSIMD_INLINE std::enable_if_t::value && (sizeof(T) == 4 || sizeof(T) == 8), void> store_masked(T* mem, batch const& src, batch_bool mask, Mode, requires_arch) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { _mm_maskstore_ps(reinterpret_cast(mem), __m128i(mask), bitwise_cast(src)); } diff --git a/include/xsimd/arch/xsimd_neon.hpp b/include/xsimd/arch/xsimd_neon.hpp index 89520a335..4c25e9c8a 100644 --- a/include/xsimd/arch/xsimd_neon.hpp +++ b/include/xsimd/arch/xsimd_neon.hpp @@ -53,7 +53,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value && std::is_same::value, int> = 0> @@ -75,7 +75,7 @@ namespace xsimd template ::value && std::is_same::value, int> = 0> XSIMD_INLINE uint8x16_t x_vreinterpretq(float32x4_t a) noexcept { return vreinterpretq_u8_f32(a); } - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value && std::is_same::value, int> = 0> @@ -97,7 +97,7 @@ namespace xsimd template ::value && std::is_same::value, int> = 0> XSIMD_INLINE int8x16_t x_vreinterpretq(float32x4_t a) noexcept { return vreinterpretq_s8_f32(a); } - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value && std::is_same::value, int> = 0> @@ -119,7 +119,7 @@ namespace xsimd template ::value && std::is_same::value, int> = 0> XSIMD_INLINE uint16x8_t x_vreinterpretq(float32x4_t a) noexcept { return vreinterpretq_u16_f32(a); } - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value && std::is_same::value, int> = 0> @@ -141,7 +141,7 @@ namespace xsimd template ::value && std::is_same::value, int> = 0> XSIMD_INLINE int16x8_t x_vreinterpretq(float32x4_t a) noexcept { return vreinterpretq_s16_f32(a); } - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value && std::is_same::value, int> = 0> @@ -163,7 +163,7 @@ namespace xsimd template ::value && std::is_same::value, int> = 0> XSIMD_INLINE uint32x4_t x_vreinterpretq(float32x4_t a) noexcept { return vreinterpretq_u32_f32(a); } - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value && std::is_same::value, int> = 0> @@ -185,7 +185,7 @@ namespace xsimd template ::value && std::is_same::value, int> = 0> XSIMD_INLINE int32x4_t x_vreinterpretq(float32x4_t a) noexcept { return vreinterpretq_s32_f32(a); } - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value && std::is_same::value, int> = 0> @@ -207,7 +207,7 @@ namespace xsimd template ::value && std::is_same::value, int> = 0> XSIMD_INLINE uint64x2_t x_vreinterpretq(float32x4_t a) noexcept { return vreinterpretq_u64_f32(a); } - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value && std::is_same::value, int> = 0> @@ -229,7 +229,7 @@ namespace xsimd template ::value && std::is_same::value, int> = 0> XSIMD_INLINE int64x2_t x_vreinterpretq(float32x4_t a) noexcept { return vreinterpretq_s64_f32(a); } - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value && std::is_same::value, int> = 0> @@ -551,7 +551,7 @@ namespace xsimd template static XSIMD_INLINE batch apply(T const* mem, batch acc) noexcept { - if constexpr(Value) + if constexpr (Value) { acc = insert(acc, mem[I], index {}); } @@ -817,7 +817,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value, int> = 0> @@ -853,7 +853,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value, int> = 0> @@ -877,7 +877,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value, int> = 0> @@ -901,7 +901,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value, int> = 0> @@ -937,7 +937,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value, int> = 0> @@ -973,7 +973,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value, int> = 0> @@ -1009,7 +1009,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value, int> = 0> @@ -1183,7 +1183,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value, int> = 0> @@ -1278,7 +1278,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value, int> = 0> @@ -1325,7 +1325,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value, int> = 0> @@ -1363,7 +1363,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value, int> = 0> @@ -1410,7 +1410,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value, int> = 0> @@ -1459,7 +1459,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value, int> = 0> @@ -1506,7 +1506,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value, int> = 0> @@ -1553,7 +1553,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value, int> = 0> @@ -1610,7 +1610,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value, int> = 0> @@ -1662,7 +1662,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value, int> = 0> @@ -1708,7 +1708,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value, int> = 0> @@ -1746,7 +1746,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value, int> = 0> @@ -1784,7 +1784,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value, int> = 0> @@ -2129,7 +2129,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value, int> = 0> @@ -3260,7 +3260,7 @@ namespace xsimd ****************/ namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value, int> = 0> @@ -3318,17 +3318,17 @@ namespace xsimd batch_constant, requires_arch) noexcept { - if constexpr(V0 == 0 && V1 == 0) + if constexpr (V0 == 0 && V1 == 0) { auto lo = vget_low_u64(self); return vcombine_u64(lo, lo); } - if constexpr(V0 == 1 && V1 == 1) + if constexpr (V0 == 1 && V1 == 1) { auto hi = vget_high_u64(self); return vcombine_u64(hi, hi); } - if constexpr(V0 == 0 && V1 == 1) + if constexpr (V0 == 0 && V1 == 1) { return self; } @@ -3374,35 +3374,35 @@ namespace xsimd constexpr bool is_dup_lo = detail::is_dup_lo(mask); constexpr bool is_dup_hi = detail::is_dup_hi(mask); - if constexpr(is_identity) + if constexpr (is_identity) { return self; } - if constexpr(is_dup_lo) + if constexpr (is_dup_lo) { - if constexpr(V0 == 0 && V1 == 1) + if constexpr (V0 == 0 && V1 == 1) { return vreinterpretq_u32_u64(vdupq_lane_u64(vget_low_u64(vreinterpretq_u64_u32(self)), 0)); } - if constexpr(V0 == 1 && V1 == 0) + if constexpr (V0 == 1 && V1 == 0) { return vreinterpretq_u32_u64(vdupq_lane_u64(vreinterpret_u64_u32(vrev64_u32(vget_low_u32(self))), 0)); } return vdupq_n_u32(vgetq_lane_u32(self, V0)); } - if constexpr(is_dup_hi) + if constexpr (is_dup_hi) { - if constexpr(V0 == 2 && V1 == 3) + if constexpr (V0 == 2 && V1 == 3) { return vreinterpretq_u32_u64(vdupq_lane_u64(vget_high_u64(vreinterpretq_u64_u32(self)), 0)); } - if constexpr(V0 == 3 && V1 == 2) + if constexpr (V0 == 3 && V1 == 2) { return vreinterpretq_u32_u64(vdupq_lane_u64(vreinterpret_u64_u32(vrev64_u32(vget_high_u32(self))), 0)); } return vdupq_n_u32(vgetq_lane_u32(self, V0)); } - if constexpr(V0 < 2 && V1 < 2 && V2 < 2 && V3 < 2) + if constexpr (V0 < 2 && V1 < 2 && V2 < 2 && V3 < 2) { uint8x8_t low = vreinterpret_u8_u64(vget_low_u64(vreinterpretq_u64_u32(self))); uint8x8_t mask_lo = detail::make_mask(); @@ -3411,7 +3411,7 @@ namespace xsimd uint8x8_t hi = vtbl1_u8(low, mask_hi); return vreinterpretq_u32_u8(vcombine_u8(lo, hi)); } - if constexpr(V0 >= 2 && V1 >= 2 && V2 >= 2 && V3 >= 2) + if constexpr (V0 >= 2 && V1 >= 2 && V2 >= 2 && V3 >= 2) { uint8x8_t high = vreinterpret_u8_u64(vget_high_u64(vreinterpretq_u64_u32(self))); uint8x8_t mask_lo = detail::make_mask(); @@ -3505,7 +3505,7 @@ namespace xsimd { // From https://github.com/DLTcollab/sse2neon/blob/master/sse2neon.h uint8x16_t msbs = vshrq_n_u8(self, 7); - if constexpr(detail::do_swap) + if constexpr (detail::do_swap) { msbs = vrev64q_u8(msbs); } @@ -3526,7 +3526,7 @@ namespace xsimd { // Adapted from https://github.com/DLTcollab/sse2neon/blob/master/sse2neon.h uint16x8_t msbs = vshrq_n_u16(self, 15); - if constexpr(detail::do_swap) + if constexpr (detail::do_swap) { msbs = vrev64q_u16(msbs); } @@ -3546,7 +3546,7 @@ namespace xsimd { // Adapted from https://github.com/DLTcollab/sse2neon/blob/master/sse2neon.h uint32x4_t msbs = vshrq_n_u32(self, 31); - if constexpr(detail::do_swap) + if constexpr (detail::do_swap) { msbs = vrev64q_u32(msbs); } @@ -3623,13 +3623,13 @@ namespace xsimd XSIMD_INLINE size_t OP(batch_bool const& self, requires_arch) noexcept \ { \ uint8x16_t inner = self; \ - if constexpr(detail::do_swap) \ + if constexpr (detail::do_swap) \ { \ inner = vrev16q_u8(inner); \ } \ \ uint8x8_t narrowed = vshrn_n_u16(vreinterpretq_u16_u8(inner), 4); \ - if constexpr(detail::do_swap) \ + if constexpr (detail::do_swap) \ { \ narrowed = vrev64_u8(narrowed); \ } \ @@ -3641,7 +3641,7 @@ namespace xsimd XSIMD_INLINE size_t OP(batch_bool const& self, requires_arch) noexcept \ { \ uint8x8_t narrowed = vmovn_u16(self); \ - if constexpr(detail::do_swap) \ + if constexpr (detail::do_swap) \ { \ narrowed = vrev64_u8(narrowed); \ } \ @@ -3653,7 +3653,7 @@ namespace xsimd XSIMD_INLINE size_t OP(batch_bool const& self, requires_arch) noexcept \ { \ uint16x4_t narrowed = vmovn_u32(self); \ - if constexpr(detail::do_swap) \ + if constexpr (detail::do_swap) \ { \ narrowed = vrev64_u16(narrowed); \ } \ @@ -3665,7 +3665,7 @@ namespace xsimd XSIMD_INLINE size_t OP(batch_bool const& self, requires_arch) noexcept \ { \ uint32x2_t narrowed = vmovn_u64(self); \ - if constexpr(detail::do_swap) \ + if constexpr (detail::do_swap) \ { \ narrowed = vrev64_u32(narrowed); \ } \ diff --git a/include/xsimd/arch/xsimd_neon64.hpp b/include/xsimd/arch/xsimd_neon64.hpp index 92400e48b..3238cad5f 100644 --- a/include/xsimd/arch/xsimd_neon64.hpp +++ b/include/xsimd/arch/xsimd_neon64.hpp @@ -894,7 +894,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value, int> = 0> @@ -932,7 +932,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value, int> = 0> @@ -977,7 +977,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value, int> = 0> @@ -1257,7 +1257,7 @@ namespace xsimd namespace wrap { - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value && std::is_same::value, int> = 0> @@ -1281,7 +1281,7 @@ namespace xsimd template ::value && std::is_same::value, int> = 0> XSIMD_INLINE float64x2_t x_vreinterpretq(float64x2_t a) noexcept { return a; } - // TODO(c++17): Make a single function with if constexpr switch + // TODO(c++17): Make a single function with if constexpr switch // Templating on the scalar type `T` is required because in some compilers (e.g. MSVC) // the vector types are all aliases of the same type. template ::value && std::is_same::value, int> = 0> diff --git a/include/xsimd/arch/xsimd_rvv.hpp b/include/xsimd/arch/xsimd_rvv.hpp index f4389b305..3f6419187 100644 --- a/include/xsimd/arch/xsimd_rvv.hpp +++ b/include/xsimd/arch/xsimd_rvv.hpp @@ -1338,7 +1338,7 @@ namespace xsimd template = 0> XSIMD_INLINE T get(batch const& arg, index, requires_arch) noexcept { - if constexpr(I == 0) + if constexpr (I == 0) { return detail_rvv::rvvmv_lane0(arg); } @@ -1348,7 +1348,7 @@ namespace xsimd template = 0> XSIMD_INLINE std::complex get(batch, A> const& arg, index, requires_arch) noexcept { - if constexpr(I == 0) + if constexpr (I == 0) { return std::complex { detail_rvv::rvvmv_lane0(arg.real()), detail_rvv::rvvmv_lane0(arg.imag()) }; } @@ -1498,7 +1498,7 @@ namespace xsimd template XSIMD_INLINE uint64_t mask(batch_bool const& self, requires_arch) noexcept { - if constexpr((8 * sizeof(T)) >= batch_bool::size) + if constexpr ((8 * sizeof(T)) >= batch_bool::size) { // (A) Easy case: the number of slots fits in T. const auto zero = detail_rvv::broadcast, types::detail::rvv_width_m1>(T(0)); @@ -1508,7 +1508,7 @@ namespace xsimd auto r = __riscv_vredor(self.data.as_mask(), upowers, (typename decltype(zero)::register_type)zero, batch_bool::size); return detail_rvv::reduce_scalar>(r); } - else if constexpr((2 * 8 * sizeof(T)) == batch_bool::size) + else if constexpr ((2 * 8 * sizeof(T)) == batch_bool::size) { // (B) We need two rounds, one for the low part, one for the high part. diff --git a/include/xsimd/arch/xsimd_sse2.hpp b/include/xsimd/arch/xsimd_sse2.hpp index cd7179815..9d7a2a77f 100644 --- a/include/xsimd/arch/xsimd_sse2.hpp +++ b/include/xsimd/arch/xsimd_sse2.hpp @@ -85,19 +85,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch add(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm_add_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_add_epi16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm_add_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm_add_epi64(self, other); } @@ -158,11 +158,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch avgr(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm_avg_epu8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_avg_epu16(self, other); } @@ -176,12 +176,12 @@ namespace xsimd template ::value>> XSIMD_INLINE batch avg(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { auto adj = ((self ^ other) << 7) >> 7; return avgr(self, other, A {}) - adj; } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { auto adj = ((self ^ other) << 15) >> 15; return avgr(self, other, A {}) - adj; @@ -272,19 +272,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch bitwise_lshift(batch const& self, int32_t other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm_and_si128(_mm_set1_epi8(0xFF << other), _mm_slli_epi32(self, other)); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_slli_epi16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm_slli_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm_slli_epi64(self, other); } @@ -299,28 +299,28 @@ namespace xsimd { constexpr auto bits = std::numeric_limits::digits + std::numeric_limits::is_signed; static_assert(shift < bits, "Count must be less than the number of bits in T"); - if constexpr(shift == 0) + if constexpr (shift == 0) { return self; } - else if constexpr(sizeof(T) == 1) + else if constexpr (sizeof(T) == 1) { // 8-bit left shift via 16-bit shift + mask __m128i shifted = _mm_slli_epi16(self, static_cast(shift)); - // TODO(C++17): without `if constexpr` we must ensure the compile-time shift does not overflow + // TODO(C++17): without `if constexpr ` we must ensure the compile-time shift does not overflow constexpr uint8_t mask8 = static_cast(sizeof(T) == 1 ? (~0u << shift) : 0); const __m128i mask = _mm_set1_epi8(mask8); return _mm_and_si128(shifted, mask); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_slli_epi16(self, static_cast(shift)); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm_slli_epi32(self, static_cast(shift)); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm_slli_epi64(self, static_cast(shift)); } @@ -333,7 +333,7 @@ namespace xsimd XSIMD_INLINE batch bitwise_lshift( batch const& self, batch_constant shifts, requires_arch req) noexcept { - if constexpr(utils::all_equals(shifts)) + if constexpr (utils::all_equals(shifts)) { return bitwise_lshift(self, req); } @@ -347,7 +347,7 @@ namespace xsimd { using uint_t = std::make_unsigned_t; - if constexpr(utils::all_equals(shifts)) + if constexpr (utils::all_equals(shifts)) { return bitwise_lshift(self, req); } @@ -429,22 +429,22 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { __m128i sign_mask = _mm_set1_epi16((0xFF00 >> other) & 0x00FF); __m128i cmp_is_negative = _mm_cmpgt_epi8(_mm_setzero_si128(), self); __m128i res = _mm_srai_epi16(self, other); return _mm_or_si128(_mm_and_si128(sign_mask, cmp_is_negative), _mm_andnot_si128(sign_mask, res)); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_srai_epi16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm_srai_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { // from https://github.com/samyvilar/vect/blob/master/vect_128.h return _mm_or_si128( @@ -461,19 +461,19 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm_and_si128(_mm_set1_epi8(0xFF >> other), _mm_srli_epi32(self, other)); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_srli_epi16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm_srli_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm_srli_epi64(self, other); } @@ -491,14 +491,14 @@ namespace xsimd static_assert(shift < bits, "Shift must be less than the number of value bits in the type"); - if constexpr(shift == 0) + if constexpr (shift == 0) { return self; } - if constexpr(std::is_signed::value) + if constexpr (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { // 8-bit arithmetic right shift via 16-bit shift + sign-extension handling. __m128i shifted = _mm_srai_epi16(self, static_cast(shift)); @@ -507,11 +507,11 @@ namespace xsimd return _mm_or_si128(_mm_and_si128(sign_mask, cmp_negative), _mm_andnot_si128(sign_mask, shifted)); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_srai_epi16(self, static_cast(shift)); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm_srai_epi32(self, static_cast(shift)); } @@ -520,20 +520,20 @@ namespace xsimd } else // unsigned / logical right shift { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { // 8-bit left shift via 16-bit shift + mask __m128i shifted = _mm_srli_epi16(self, static_cast(shift)); - // TODO(C++17): without `if constexpr` we must ensure the compile-time shift does not overflow + // TODO(C++17): without `if constexpr ` we must ensure the compile-time shift does not overflow constexpr uint8_t mask8 = static_cast(sizeof(T) == 1 ? ((1u << shift) - 1u) : 0); const __m128i mask = _mm_set1_epi8(mask8); return _mm_and_si128(shifted, mask); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_srli_epi16(self, static_cast(shift)); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm_srli_epi32(self, static_cast(shift)); } @@ -622,19 +622,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch broadcast(T val, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm_set1_epi8(val); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_set1_epi16(val); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm_set1_epi32(val); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm_set1_epi64x(val); } @@ -756,19 +756,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch_bool eq(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm_cmpeq_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_cmpeq_epi16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm_cmpeq_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { __m128i tmp1 = _mm_cmpeq_epi32(self, other); __m128i tmp2 = _mm_shuffle_epi32(tmp1, 0xB1); @@ -814,19 +814,19 @@ namespace xsimd template ::value>> XSIMD_INLINE T first(batch const& self, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return static_cast(_mm_cvtsi128_si32(self) & 0xFF); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return static_cast(_mm_cvtsi128_si32(self) & 0xFFFF); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return static_cast(_mm_cvtsi128_si32(self)); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { #if defined(__x86_64__) return static_cast(_mm_cvtsi128_si64(self)); @@ -921,21 +921,21 @@ namespace xsimd 0xFFFFFF00, 0xFFFFFFFF, }; - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { assert(!(mask & ~0xFFFF) && "inbound mask"); return _mm_setr_epi32(lut32[mask & 0xF], lut32[(mask >> 4) & 0xF], lut32[(mask >> 8) & 0xF], lut32[mask >> 12]); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { assert(!(mask & ~0xFF) && "inbound mask"); return _mm_set_epi64x(lut64[mask >> 4], lut64[mask & 0xF]); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm_castps_si128(from_mask(batch_bool {}, mask, sse2 {})); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm_castpd_si128(from_mask(batch_bool {}, mask, sse2 {})); } @@ -964,15 +964,15 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm_cmpgt_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_cmpgt_epi16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm_cmpgt_epi32(self, other); } @@ -1025,7 +1025,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch insert(batch const& self, T val, index pos, requires_arch) noexcept { - if constexpr(sizeof(T) == 2) + if constexpr (sizeof(T) == 2) { return _mm_insert_epi16(self, val, I); } @@ -1117,23 +1117,23 @@ namespace xsimd template ::value>> XSIMD_INLINE batch load_masked(T const* mem, batch_bool_constant mask, convert, Mode, requires_arch) noexcept { - if constexpr(sizeof(T) == 2 && mask.prefix() == 1) + if constexpr (sizeof(T) == 2 && mask.prefix() == 1) { return _mm_loadu_si16(mem); } - else if constexpr(sizeof(T) == 4 && mask.prefix() == 1) + else if constexpr (sizeof(T) == 4 && mask.prefix() == 1) { return _mm_loadu_si32(mem); } - else if constexpr(sizeof(T) == 8 && mask.prefix() == 1) + else if constexpr (sizeof(T) == 8 && mask.prefix() == 1) { return _mm_loadu_si64(mem); } - else if constexpr(sizeof(T) == 2 && mask.prefix() == 2) + else if constexpr (sizeof(T) == 2 && mask.prefix() == 2) { return _mm_loadu_si32(mem); } - else if constexpr(sizeof(T) == 4 && mask.prefix() == 2) + else if constexpr (sizeof(T) == 4 && mask.prefix() == 2) { return _mm_loadu_si64(mem); } @@ -1145,19 +1145,19 @@ namespace xsimd template XSIMD_INLINE batch load_masked(float const* mem, batch_bool_constant mask, convert, Mode, requires_arch) noexcept { - if constexpr(mask.prefix() == 1) + if constexpr (mask.prefix() == 1) { return _mm_load_ss(mem); } - else if constexpr(mask.prefix() == 2) + else if constexpr (mask.prefix() == 2) { return _mm_loadl_pi(_mm_setzero_ps(), reinterpret_cast<__m64 const*>(mem)); } - else if constexpr(mask.suffix() == 2) + else if constexpr (mask.suffix() == 2) { return _mm_loadh_pi(_mm_setzero_ps(), reinterpret_cast<__m64 const*>(mem + 2)); } - else if constexpr(mask.prefix() == 3) + else if constexpr (mask.prefix() == 3) { __m128 const lo2 = _mm_castsi128_ps(_mm_loadl_epi64(reinterpret_cast<__m128i const*>(mem))); return _mm_shuffle_ps(lo2, _mm_load_ss(mem + 2), _MM_SHUFFLE(3, 0, 1, 0)); @@ -1170,11 +1170,11 @@ namespace xsimd template XSIMD_INLINE batch load_masked(double const* mem, batch_bool_constant mask, convert, Mode, requires_arch) noexcept { - if constexpr(mask.prefix() == 1) + if constexpr (mask.prefix() == 1) { return _mm_load_sd(mem); } - else if constexpr(mask.suffix() == 1) + else if constexpr (mask.suffix() == 1) { return _mm_loadh_pd(_mm_setzero_pd(), mem + 1); } @@ -1188,19 +1188,19 @@ namespace xsimd template XSIMD_INLINE void store_masked(float* mem, batch const& src, batch_bool_constant mask, Mode, requires_arch) noexcept { - if constexpr(mask.prefix() == 1) + if constexpr (mask.prefix() == 1) { _mm_store_ss(mem, src); } - else if constexpr(mask.prefix() == 2) + else if constexpr (mask.prefix() == 2) { _mm_storel_pi(reinterpret_cast<__m64*>(mem), src); } - else if constexpr(mask.suffix() == 2) + else if constexpr (mask.suffix() == 2) { _mm_storeh_pi(reinterpret_cast<__m64*>(mem + 2), src); } - else if constexpr(mask.prefix() == 3) + else if constexpr (mask.prefix() == 3) { _mm_storel_pi(reinterpret_cast<__m64*>(mem), src); _mm_store_ss(mem + 2, _mm_movehl_ps(src, src)); @@ -1214,11 +1214,11 @@ namespace xsimd template XSIMD_INLINE void store_masked(double* mem, batch const& src, batch_bool_constant mask, Mode, requires_arch) noexcept { - if constexpr(mask.prefix() == 1) + if constexpr (mask.prefix() == 1) { _mm_store_sd(mem, src); } - else if constexpr(mask.suffix() == 1) + else if constexpr (mask.suffix() == 1) { _mm_storeh_pd(mem + 1, src); } @@ -1267,19 +1267,19 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm_cmplt_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_cmplt_epi16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm_cmplt_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { __m128i tmp1 = _mm_sub_epi64(self, other); __m128i tmp2 = _mm_xor_si128(self, other); @@ -1297,19 +1297,19 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm_cmplt_epi8(_mm_xor_si128(self, _mm_set1_epi8(std::numeric_limits::lowest())), _mm_xor_si128(other, _mm_set1_epi8(std::numeric_limits::lowest()))); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_cmplt_epi16(_mm_xor_si128(self, _mm_set1_epi16(std::numeric_limits::lowest())), _mm_xor_si128(other, _mm_set1_epi16(std::numeric_limits::lowest()))); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm_cmplt_epi32(_mm_xor_si128(self, _mm_set1_epi32(std::numeric_limits::lowest())), _mm_xor_si128(other, _mm_set1_epi32(std::numeric_limits::lowest()))); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { auto xself = _mm_xor_si128(self, _mm_set1_epi64x(std::numeric_limits::lowest())); auto xother = _mm_xor_si128(other, _mm_set1_epi64x(std::numeric_limits::lowest())); @@ -1370,20 +1370,20 @@ namespace xsimd template ::value>> XSIMD_INLINE uint64_t mask(batch_bool const& self, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm_movemask_epi8(self); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { uint64_t mask8 = _mm_movemask_epi8(self); return detail::mask_lut(mask8) | (detail::mask_lut(mask8 >> 8) << 4); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm_movemask_ps(_mm_castsi128_ps(self)); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm_movemask_pd(_mm_castsi128_pd(self)); } @@ -1597,7 +1597,7 @@ namespace xsimd template ::value>> XSIMD_INLINE T reduce_add(batch const& self, requires_arch) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { __m128i tmp1 = _mm_shuffle_epi32(self, 0x0E); __m128i tmp2 = _mm_add_epi32(self, tmp1); @@ -1605,7 +1605,7 @@ namespace xsimd __m128i tmp4 = _mm_add_epi32(tmp2, tmp3); return _mm_cvtsi128_si32(tmp4); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { __m128i tmp1 = _mm_shuffle_epi32(self, 0x0E); __m128i tmp2 = _mm_add_epi64(self, tmp1); @@ -1693,7 +1693,7 @@ namespace xsimd template ::value>> XSIMD_INLINE T reduce_mul(batch const& self, requires_arch) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { batch tmp1 = _mm_shuffle_epi32(self, _MM_SHUFFLE(0, 1, 2, 3)); tmp1 = tmp1 * self; @@ -1701,7 +1701,7 @@ namespace xsimd tmp2 = tmp2 * tmp1; return _mm_cvtsi128_si32(tmp2); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { batch tmp1 = _mm_unpackhi_epi64(self, self); auto tmp2 = tmp1 * self; @@ -1818,11 +1818,11 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm_adds_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_adds_epi16(self, other); } @@ -1833,11 +1833,11 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm_adds_epu8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_adds_epu16(self, other); } @@ -1911,11 +1911,11 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm_subs_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_subs_epi16(self, other); } @@ -1926,11 +1926,11 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm_subs_epu8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_subs_epu16(self, other); } @@ -1949,13 +1949,13 @@ namespace xsimd { // GCC <12 have missing or buggy unaligned store intrinsics; use memcpy to work around this. // GCC/Clang/MSVC will turn it into the correct store. - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { // negate mask to convert to 0 or 1 auto val = _mm_sub_epi8(_mm_set1_epi8(0), b); memcpy(mem, &val, sizeof(val)); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { auto val = _mm_sub_epi8(_mm_set1_epi8(0), _mm_packs_epi16(b, b)); #if defined(__x86_64__) @@ -1965,13 +1965,13 @@ namespace xsimd memcpy(mem, &val, sizeof(uint64_t)); #endif } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { auto pack_16 = _mm_packs_epi32(b, b); uint32_t val = _mm_cvtsi128_si32(_mm_sub_epi8(_mm_set1_epi8(0), _mm_packs_epi16(pack_16, pack_16))); memcpy(mem, &val, sizeof(val)); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { auto pack_32 = _mm_packs_epi32(b, b); auto pack_16 = _mm_packs_epi32(pack_32, pack_32); @@ -2065,19 +2065,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch sub(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm_sub_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_sub_epi16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm_sub_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm_sub_epi64(self, other); } @@ -2141,11 +2141,11 @@ namespace xsimd constexpr bool is_dup_lo = detail::is_dup_lo(mask); constexpr bool is_dup_hi = detail::is_dup_hi(mask); - if constexpr(is_identity) + if constexpr (is_identity) { return self; } - if constexpr(is_dup_lo) + if constexpr (is_dup_lo) { // permute the low half constexpr int imm = detail::mod_shuffle(V0, V1, V2, V3); @@ -2154,7 +2154,7 @@ namespace xsimd const auto lo_all = _mm_unpacklo_epi64(lo, lo); return lo_all; } - if constexpr(is_dup_hi) + if constexpr (is_dup_hi) { // permute the high half constexpr int imm = detail::mod_shuffle(V4, V5, V6, V7); @@ -2164,7 +2164,7 @@ namespace xsimd return hi_all; } // Only pick elements from the low lane - if constexpr(detail::is_only_from_lo(mask)) + if constexpr (detail::is_only_from_lo(mask)) { // permute within each sub lane constexpr auto mask_lo = detail::mod_shuffle(V0, V1, V2, V3); @@ -2176,7 +2176,7 @@ namespace xsimd return _mm_unpacklo_epi64(lol, loh); } // Only pick elements from the high lane - if constexpr(detail::is_only_from_hi(mask)) + if constexpr (detail::is_only_from_hi(mask)) { // permute within each sub lane constexpr auto mask_lo = detail::mod_shuffle(V0, V1, V2, V3); @@ -2268,19 +2268,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch zip_hi(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm_unpackhi_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_unpackhi_epi16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm_unpackhi_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm_unpackhi_epi64(self, other); } @@ -2305,19 +2305,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch zip_lo(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm_unpacklo_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_unpacklo_epi16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm_unpacklo_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm_unpacklo_epi64(self, other); } @@ -2341,11 +2341,11 @@ namespace xsimd aligned_mode, requires_arch) noexcept { - if constexpr(mask.prefix() == 2) + if constexpr (mask.prefix() == 2) { _mm_storel_pi(reinterpret_cast<__m64*>(mem), src); } - else if constexpr(mask.suffix() == 2) + else if constexpr (mask.suffix() == 2) { _mm_storeh_pi(reinterpret_cast<__m64*>(mem + 2), src); } @@ -2378,11 +2378,11 @@ namespace xsimd XSIMD_INLINE typename std::enable_if::value && sizeof(T) <= 2, T>::type get(batch const& self, ::xsimd::index, requires_arch) noexcept { - if constexpr(I == 0) + if constexpr (I == 0) { return first(self, A {}); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return static_cast(_mm_extract_epi16(self, I)); } @@ -2397,7 +2397,7 @@ namespace xsimd XSIMD_INLINE typename std::enable_if<(std::is_integral::value && sizeof(T) >= 4) || std::is_floating_point::value, T>::type get(batch const& self, ::xsimd::index, requires_arch) noexcept { - if constexpr(I == 0) + if constexpr (I == 0) { return first(self, A {}); } diff --git a/include/xsimd/arch/xsimd_sse4_1.hpp b/include/xsimd/arch/xsimd_sse4_1.hpp index 913979415..c436e3545 100644 --- a/include/xsimd/arch/xsimd_sse4_1.hpp +++ b/include/xsimd/arch/xsimd_sse4_1.hpp @@ -83,7 +83,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch_bool eq(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 8) + if constexpr (sizeof(T) == 8) { return _mm_cmpeq_epi64(self, other); } @@ -109,23 +109,23 @@ namespace xsimd template ::value>> XSIMD_INLINE T get(batch const& self, ::xsimd::index, requires_arch) noexcept { - if constexpr(I == 0) + if constexpr (I == 0) { return first(self, sse2 {}); } - else if constexpr(sizeof(T) == 1) + else if constexpr (sizeof(T) == 1) { return static_cast(_mm_extract_epi8(self, I)); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return static_cast(_mm_extract_epi16(self, I)); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return static_cast(_mm_extract_epi32(self, I)); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { #if defined(__x86_64__) return static_cast(_mm_extract_epi64(self, I)); @@ -144,15 +144,15 @@ namespace xsimd template ::value>> XSIMD_INLINE batch insert(batch const& self, T val, index pos, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm_insert_epi8(self, val, I); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm_insert_epi32(self, val, I); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { #if (!defined(_MSC_VER) && __x86_64__) || (_MSC_VER > 1900 && defined(_M_X64)) return _mm_insert_epi64(self, val, I); @@ -176,7 +176,7 @@ namespace xsimd { // GCC <12 have missing or buggy unaligned load intrinsics; use memcpy to work around this. // GCC/Clang/MSVC will turn it into the correct load. - if constexpr(sizeof(T) == 2) + if constexpr (sizeof(T) == 2) { #if defined(__x86_64__) uint64_t tmp; @@ -188,13 +188,13 @@ namespace xsimd #endif return { _mm_sub_epi16(_mm_set1_epi8(0), _mm_cvtepu8_epi16(val)) }; } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { uint32_t tmp; memcpy(&tmp, mem, sizeof(tmp)); return { _mm_sub_epi32(_mm_set1_epi8(0), _mm_cvtepu8_epi32(_mm_cvtsi32_si128(tmp))) }; } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { uint16_t tmp; memcpy(&tmp, mem, sizeof(tmp)); @@ -225,15 +225,15 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm_max_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_max_epi16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm_max_epi32(self, other); } @@ -244,15 +244,15 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm_max_epu8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_max_epu16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm_max_epu32(self, other); } @@ -286,15 +286,15 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm_min_epi8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_min_epi16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm_min_epi32(self, other); } @@ -305,15 +305,15 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm_min_epu8(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_min_epu16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm_min_epu32(self, other); } @@ -328,21 +328,21 @@ namespace xsimd template ::value>> XSIMD_INLINE batch mul(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm_or_si128( _mm_and_si128(_mm_mullo_epi16(self, other), _mm_srli_epi16(_mm_cmpeq_epi8(self, self), 8)), _mm_slli_epi16(_mm_mullo_epi16(_mm_srli_epi16(self, 8), _mm_srli_epi16(other, 8)), 8)); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_mullo_epi16(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm_mullo_epi32(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm_add_epi64( _mm_mul_epu32(self, other), @@ -446,16 +446,16 @@ namespace xsimd XSIMD_INLINE batch select(batch_bool_constant const&, batch const& true_br, batch const& false_br, requires_arch) noexcept { constexpr int mask = batch_bool_constant::mask(); - if constexpr(sizeof(T) == 2) + if constexpr (sizeof(T) == 2) { return _mm_blend_epi16(false_br, true_br, mask); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { constexpr int imask = detail::interleave(mask); return _mm_blend_epi16(false_br, true_br, imask); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { constexpr int imask = detail::interleave(mask); constexpr int imask2 = detail::interleave(imask); @@ -498,9 +498,9 @@ namespace xsimd __m128i x_lo = x; __m128i x_hi = _mm_unpackhi_epi64(x, x); __m128i lo, hi; - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { - if constexpr(std::is_signed::value) + if constexpr (std::is_signed::value) { lo = _mm_cvtepi32_epi64(x_lo); hi = _mm_cvtepi32_epi64(x_hi); @@ -511,9 +511,9 @@ namespace xsimd hi = _mm_cvtepu32_epi64(x_hi); } } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { - if constexpr(std::is_signed::value) + if constexpr (std::is_signed::value) { lo = _mm_cvtepi16_epi32(x_lo); hi = _mm_cvtepi16_epi32(x_hi); @@ -524,9 +524,9 @@ namespace xsimd hi = _mm_cvtepu16_epi32(x_hi); } } - else if constexpr(sizeof(T) == 1) + else if constexpr (sizeof(T) == 1) { - if constexpr(std::is_signed::value) + if constexpr (std::is_signed::value) { lo = _mm_cvtepi8_epi16(x_lo); hi = _mm_cvtepi8_epi16(x_hi); diff --git a/include/xsimd/arch/xsimd_ssse3.hpp b/include/xsimd/arch/xsimd_ssse3.hpp index d6b969c3f..8e8570f98 100644 --- a/include/xsimd/arch/xsimd_ssse3.hpp +++ b/include/xsimd/arch/xsimd_ssse3.hpp @@ -29,19 +29,19 @@ namespace xsimd template ::value && std::is_signed::value>> XSIMD_INLINE batch abs(batch const& self, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return _mm_abs_epi8(self); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return _mm_abs_epi16(self); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return _mm_abs_epi32(self); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return _mm_abs_epi64(self); } @@ -86,14 +86,14 @@ namespace xsimd template ::value>> XSIMD_INLINE T reduce_add(batch const& self, requires_arch) noexcept { - if constexpr(sizeof(T) == 2) + if constexpr (sizeof(T) == 2) { __m128i tmp1 = _mm_hadd_epi16(self, self); __m128i tmp2 = _mm_hadd_epi16(tmp1, tmp1); __m128i tmp3 = _mm_hadd_epi16(tmp2, tmp2); return _mm_cvtsi128_si32(tmp3) & 0xFFFF; } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { __m128i tmp1 = _mm_hadd_epi32(self, self); __m128i tmp2 = _mm_hadd_epi32(tmp1, tmp1); diff --git a/include/xsimd/arch/xsimd_vsx.hpp b/include/xsimd/arch/xsimd_vsx.hpp index 99f6e7d4f..202cd6be5 100644 --- a/include/xsimd/arch/xsimd_vsx.hpp +++ b/include/xsimd/arch/xsimd_vsx.hpp @@ -125,7 +125,7 @@ namespace xsimd template ::value>> XSIMD_INLINE batch avg(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) < 8) + if constexpr (sizeof(T) < 8) { constexpr auto nbit = 8 * sizeof(T) - 1; auto adj = bitwise_cast(bitwise_cast>((self ^ other) << nbit) >> nbit); @@ -217,7 +217,7 @@ namespace xsimd { using shift_type = as_unsigned_integer_t; batch shift(static_cast(other)); - if constexpr(std::is_signed::value) + if constexpr (std::is_signed::value) { return vec_sra(self.data, shift.data); } @@ -730,7 +730,7 @@ namespace xsimd template XSIMD_INLINE batch slide_left(batch const& x, requires_arch) noexcept { - if constexpr(N == batch::size * sizeof(T)) + if constexpr (N == batch::size * sizeof(T)) { return batch(0); } @@ -745,7 +745,7 @@ namespace xsimd template XSIMD_INLINE batch slide_right(batch const& x, requires_arch) noexcept { - if constexpr(N == batch::size * sizeof(T)) + if constexpr (N == batch::size * sizeof(T)) { return batch(0); } diff --git a/include/xsimd/arch/xsimd_vxe.hpp b/include/xsimd/arch/xsimd_vxe.hpp index 6cf952eec..b1c58730c 100644 --- a/include/xsimd/arch/xsimd_vxe.hpp +++ b/include/xsimd/arch/xsimd_vxe.hpp @@ -441,7 +441,7 @@ namespace xsimd template ::value, void>::type> XSIMD_INLINE T reduce_add(batch const& self, requires_arch) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { using t = typename batch::register_type; t shifted_64 = vec_sld(self.data, self.data, 8); @@ -449,7 +449,7 @@ namespace xsimd t shifted_32 = vec_sld(added_1, added_1, 4); return (added_1 + shifted_32)[0]; } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { using t = typename batch::register_type; t shifted_64 = vec_sld(self.data, self.data, 8); @@ -489,7 +489,7 @@ namespace xsimd template XSIMD_INLINE batch slide_left(batch const& x, requires_arch) noexcept { - if constexpr(N == batch::size * sizeof(T)) + if constexpr (N == batch::size * sizeof(T)) { return batch(0); } @@ -504,7 +504,7 @@ namespace xsimd template XSIMD_INLINE batch slide_right(batch const& x, requires_arch) noexcept { - if constexpr(N == batch::size * sizeof(T)) + if constexpr (N == batch::size * sizeof(T)) { return batch(0); } diff --git a/include/xsimd/arch/xsimd_wasm.hpp b/include/xsimd/arch/xsimd_wasm.hpp index 76428cf3a..1271b77fa 100644 --- a/include/xsimd/arch/xsimd_wasm.hpp +++ b/include/xsimd/arch/xsimd_wasm.hpp @@ -47,19 +47,19 @@ namespace xsimd template ::value && std::is_signed::value>> XSIMD_INLINE batch abs(batch const& self, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return wasm_i8x16_abs(self); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return wasm_i16x8_abs(self); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return wasm_i32x4_abs(self); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return wasm_i64x2_abs(self); } @@ -86,19 +86,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch add(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return wasm_i8x16_add(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return wasm_i16x8_add(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return wasm_i32x4_add(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return wasm_i64x2_add(self, other); } @@ -125,11 +125,11 @@ namespace xsimd template ::value>> XSIMD_INLINE batch avgr(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return wasm_u8x16_avgr(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return wasm_u16x8_avgr(self, other); } @@ -143,12 +143,12 @@ namespace xsimd template ::value>> XSIMD_INLINE batch avg(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { auto adj = ((self ^ other) << 7) >> 7; return avgr(self, other, A {}) - adj; } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { auto adj = ((self ^ other) << 15) >> 15; return avgr(self, other, A {}) - adj; @@ -250,19 +250,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch bitwise_lshift(batch const& self, int32_t other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return wasm_i8x16_shl(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return wasm_i16x8_shl(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return wasm_i32x4_shl(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return wasm_i64x2_shl(self, other); } @@ -279,19 +279,19 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return wasm_i8x16_shr(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return wasm_i16x8_shr(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return wasm_i32x4_shr(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return wasm_i64x2_shr(self, other); } @@ -303,19 +303,19 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return wasm_u8x16_shr(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return wasm_u16x8_shr(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return wasm_u32x4_shr(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return wasm_u64x2_shr(self, other); } @@ -362,19 +362,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch broadcast(T val, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return wasm_i8x16_splat(val); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return wasm_i16x8_splat(val); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return wasm_i32x4_splat(val); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return wasm_i64x2_splat(val); } @@ -428,19 +428,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch_bool eq(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return wasm_i8x16_eq(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return wasm_i16x8_eq(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return wasm_i32x4_eq(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return wasm_i64x2_eq(self, other); } @@ -453,19 +453,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch_bool eq(batch_bool const& self, batch_bool const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return wasm_i8x16_eq(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return wasm_i16x8_eq(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return wasm_i32x4_eq(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return wasm_i64x2_eq(self, other); } @@ -541,19 +541,19 @@ namespace xsimd template ::value>> XSIMD_INLINE T first(batch const& self, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return wasm_i8x16_extract_lane(self, 0); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return wasm_i16x8_extract_lane(self, 0); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return wasm_i32x4_extract_lane(self, 0); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return wasm_i64x2_extract_lane(self, 0); } @@ -682,22 +682,22 @@ namespace xsimd { 0x0000000000000000ul, 0xFFFFFFFFFFFFFFFFul }, { 0xFFFFFFFFFFFFFFFFul, 0xFFFFFFFFFFFFFFFFul }, }; - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { assert(!(mask & ~0xFFFF) && "inbound mask"); return wasm_i32x4_make(lut32[mask & 0xF], lut32[(mask >> 4) & 0xF], lut32[(mask >> 8) & 0xF], lut32[mask >> 12]); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { assert(!(mask & ~0xFF) && "inbound mask"); return wasm_i64x2_make(lut64[mask & 0xF], lut64[mask >> 4]); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { assert(!(mask & ~0xFul) && "inbound mask"); return wasm_v128_load((const v128_t*)lut16[mask]); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { assert(!(mask & ~0x3ul) && "inbound mask"); return wasm_v128_load((const v128_t*)lut8[mask]); @@ -727,19 +727,19 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return wasm_i8x16_gt(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return wasm_i16x8_gt(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return wasm_i32x4_gt(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return wasm_i64x2_gt(self, other); } @@ -751,15 +751,15 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return wasm_u8x16_gt(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return wasm_u16x8_gt(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return wasm_u32x4_gt(self, other); } @@ -808,19 +808,19 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return wasm_i8x16_replace_lane(self, pos, val); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return wasm_i16x8_replace_lane(self, pos, val); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return wasm_i32x4_replace_lane(self, pos, val); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return wasm_i64x2_replace_lane(self, pos, val); } @@ -832,19 +832,19 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return wasm_u8x16_replace_lane(self, pos, val); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return wasm_u16x8_replace_lane(self, pos, val); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return wasm_u32x4_replace_lane(self, pos, val); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return wasm_u64x2_replace_lane(self, pos, val); } @@ -946,19 +946,19 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return wasm_i8x16_lt(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return wasm_i16x8_lt(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return wasm_i32x4_lt(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return wasm_i64x2_lt(self, other); } @@ -970,19 +970,19 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return wasm_u8x16_lt(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return wasm_u16x8_lt(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return wasm_u32x4_lt(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { auto xself = wasm_v128_xor(self, wasm_i64x2_splat(std::numeric_limits::lowest())); auto xother = wasm_v128_xor(other, wasm_i64x2_splat(std::numeric_limits::lowest())); @@ -1012,19 +1012,19 @@ namespace xsimd template ::value>> XSIMD_INLINE uint64_t mask(batch_bool const& self, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return wasm_i8x16_bitmask(self); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return wasm_i16x8_bitmask(self); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return wasm_i32x4_bitmask(self); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return wasm_i64x2_bitmask(self); } @@ -1096,19 +1096,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch neg(batch const& self, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return wasm_i8x16_neg(self); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return wasm_i16x8_neg(self); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return wasm_i32x4_neg(self); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return wasm_i64x2_neg(self); } @@ -1191,7 +1191,7 @@ namespace xsimd template ::value>> XSIMD_INLINE T reduce_add(batch const& self, requires_arch) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { v128_t tmp0 = wasm_i32x4_shuffle(self, wasm_i32x4_splat(0), 2, 3, 0, 0); v128_t tmp1 = wasm_i32x4_add(self, tmp0); @@ -1199,7 +1199,7 @@ namespace xsimd v128_t tmp3 = wasm_i32x4_add(tmp1, tmp2); return wasm_i32x4_extract_lane(tmp3, 0); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { v128_t tmp0 = wasm_i32x4_shuffle(self, wasm_i32x4_splat(0), 2, 3, 0, 0); v128_t tmp1 = wasm_i64x2_add(self, tmp0); @@ -1232,7 +1232,7 @@ namespace xsimd template ::value>> XSIMD_INLINE T reduce_mul(batch const& self, requires_arch) noexcept { - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { v128_t tmp0 = wasm_i32x4_shuffle(self, wasm_i32x4_splat(0), 2, 3, 0, 0); v128_t tmp1 = wasm_i32x4_mul(self, tmp0); @@ -1240,7 +1240,7 @@ namespace xsimd v128_t tmp3 = wasm_i32x4_mul(tmp1, tmp2); return wasm_i32x4_extract_lane(tmp3, 0); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { v128_t tmp0 = wasm_i32x4_shuffle(self, wasm_i32x4_splat(0), 2, 3, 0, 0); v128_t tmp1 = wasm_i64x2_mul(self, tmp0); @@ -1312,11 +1312,11 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return wasm_i8x16_add_sat(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return wasm_i16x8_add_sat(self, other); } @@ -1327,11 +1327,11 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return wasm_u8x16_add_sat(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return wasm_u16x8_add_sat(self, other); } @@ -1443,11 +1443,11 @@ namespace xsimd { if (std::is_signed::value) { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return wasm_i8x16_sub_sat(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return wasm_i16x8_sub_sat(self, other); } @@ -1458,11 +1458,11 @@ namespace xsimd } else { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return wasm_u8x16_sub_sat(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return wasm_u16x8_sub_sat(self, other); } @@ -1553,19 +1553,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch sub(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return wasm_i8x16_sub(self, other); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return wasm_i16x8_sub(self, other); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return wasm_i32x4_sub(self, other); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return wasm_i64x2_sub(self, other); } @@ -1662,7 +1662,7 @@ namespace xsimd { assert((matrix_end - matrix_begin == batch::size) && "correctly sized matrix"); (void)matrix_end; - if constexpr(sizeof(T) == 4) + if constexpr (sizeof(T) == 4) { auto r0 = matrix_begin[0], r1 = matrix_begin[1], r2 = matrix_begin[2], r3 = matrix_begin[3]; @@ -1677,7 +1677,7 @@ namespace xsimd matrix_begin[2] = wasm_i32x4_shuffle(t1, t3, 0, 1, 4, 5); // r0[2] r1[2] r2[2] r3[2] matrix_begin[3] = wasm_i32x4_shuffle(t1, t3, 2, 3, 6, 7); // r0[3] r1[3] r2[3] r3[3] } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { auto r0 = matrix_begin[0], r1 = matrix_begin[1]; @@ -1749,19 +1749,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch zip_hi(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return wasm_i8x16_shuffle(self, other, 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return wasm_i16x8_shuffle(self, other, 4, 12, 5, 13, 6, 14, 7, 15); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return wasm_i32x4_shuffle(self, other, 2, 6, 3, 7); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return wasm_i64x2_shuffle(self, other, 1, 3); } @@ -1786,19 +1786,19 @@ namespace xsimd template ::value>> XSIMD_INLINE batch zip_lo(batch const& self, batch const& other, requires_arch) noexcept { - if constexpr(sizeof(T) == 1) + if constexpr (sizeof(T) == 1) { return wasm_i8x16_shuffle(self, other, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23); } - else if constexpr(sizeof(T) == 2) + else if constexpr (sizeof(T) == 2) { return wasm_i16x8_shuffle(self, other, 0, 8, 1, 9, 2, 10, 3, 11); } - else if constexpr(sizeof(T) == 4) + else if constexpr (sizeof(T) == 4) { return wasm_i32x4_shuffle(self, other, 0, 4, 1, 5); } - else if constexpr(sizeof(T) == 8) + else if constexpr (sizeof(T) == 8) { return wasm_i64x2_shuffle(self, other, 0, 2); } diff --git a/include/xsimd/types/xsimd_batch.hpp b/include/xsimd/types/xsimd_batch.hpp index f45c155af..b45a8ee4b 100644 --- a/include/xsimd/types/xsimd_batch.hpp +++ b/include/xsimd/types/xsimd_batch.hpp @@ -850,11 +850,11 @@ namespace xsimd detail::static_check_supported_config(); static_assert(std::is_same::value || std::is_same::value, "supported load mode"); - if constexpr(mask.all()) + if constexpr (mask.all()) { return load(mem, mode); } - else if constexpr(mask.none()) + else if constexpr (mask.none()) { return broadcast(0); } @@ -881,11 +881,11 @@ namespace xsimd detail::static_check_supported_config(); static_assert(std::is_same::value || std::is_same::value, "supported store mode"); - if constexpr(mask.none()) + if constexpr (mask.none()) { return; } - else if constexpr(mask.all()) + else if constexpr (mask.all()) { store(mem, mode); } diff --git a/test/test_batch.cpp b/test/test_batch.cpp index 3cdb2e481..484a051d3 100644 --- a/test/test_batch.cpp +++ b/test/test_batch.cpp @@ -1135,7 +1135,7 @@ struct batch_test void init_operands() { - if constexpr(std::is_integral::value) + if constexpr (std::is_integral::value) { for (size_t i = 0; i < size; ++i) {