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[blackwell][draft] sm100: FP8 blockwise GEMM -> torch._scaled_mm (#226) - #234

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[blackwell][draft] sm100: FP8 blockwise GEMM -> torch._scaled_mm (#226)#234
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Closes #226. Part of #204 (Blackwell Phase 2).

Summary

Add arch=='sm100' branch in grouped_fp8_blockwise_moe.py calling torch._scaled_mm(a_fp8, b_fp8, scale_a, scale_b, out_dtype=bfloat16).

Spec

blackwell-kernel-port-v1.md § Sub-task 3

v-tairan Copilot user and others added 2 commits May 30, 2026 09:24
Placeholder commit for draft PR. Implementation tracked in:
batchgen-agent-metadata/batchgen_design/blackwell/blackwell-kernel-port-v1.md

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
The compiled SM90a CuTe FP8 blockwise kernel is unavailable on Blackwell,
and cuBLAS in torch 2.9+cu129 rejects 1x128/128x128 blockwise FP8 scaling
(heuristic returns CUBLAS_STATUS_NOT_SUPPORTED; fast-accum unsupported for
1x128). Only row-wise/tensor-wise FP8 GEMM is available.

Add an sm100 branch in grouped_fp8_blockwise_gemm() that emulates deepseek
blockwise scaling exactly: split the K contraction into 128-wide blocks and
issue one row-wise torch._scaled_mm per block, accumulating partials in fp32.
Within a K-block the act scale is constant per row (1x128) and the weight
scale is constant per 128-output-row block (128x128, expanded to per-column),
so the row-wise GEMM is numerically identical to true blockwise for that block.

- Processes the full uniform mtp reserved rows per expert -> static control
  flow, CUDA-graph compatible (no host sync on seqlens, no data-dependent
  shapes). Padding-row outputs are ignored by downstream gather.
- Covers s1 (gate+up), s3 (down) and fused_s1 automatically since all route
  through grouped_fp8_blockwise_gemm (fused_s1 falls back to s1_silu on sm100
  as its _C kernel is absent).
- Dim asserts (K,N multiples of 128; scale shapes) guard silent mis-scaling.

Verified on B200 (GLM-5 / MiniMax-M2.5 style dims, E=4, mtp=64, K=2048,
N=1536, incl. a zero-token expert): GEMM max rel 0.0039, S1+SiLU 0.0056,
fused_s1 matches s1_silu (< 1e-2 acceptance).

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@github-actions github-actions Bot added the ci:run Trigger build + GPU regression on H20 label May 31, 2026
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[blackwell] sm100: FP8 blockwise GEMM -> torch._scaled_mm

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