[blackwell][draft] sm100: Fused INT4 grouped + SiLU Triton kernel (#231) - #239
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[blackwell][draft] sm100: Fused INT4 grouped + SiLU Triton kernel (#231)#239Andrewxu313 wants to merge 5 commits into
Andrewxu313 wants to merge 5 commits into
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Placeholder commit for draft PR. Implementation tracked in: batchgen-agent-metadata/batchgen_design/blackwell/blackwell-kernel-port-v1.md Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Placeholder commit for draft PR. Implementation tracked in: batchgen-agent-metadata/batchgen_design/blackwell/blackwell-kernel-port-v1.md Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Pure-Triton port of the Hopper WGMMA INT4 grouped MoE GEMM building block. Matches the SM90a .cu weight layout: w_packed [N, K//2] uint8 (low nibble = even-K, high nibble = odd-K), scale [N, K//32] bf16, group_size=32, dequant (nibble-8)*scale. GEMM via even/odd column split + two bf16 tl.dot with FP32 accumulation (avoids in-kernel nibble interleave). - batchgen_kernels/triton/int4_grouped_gemm.py: int4_grouped_gemm (single expert) + int4_moe_grouped_gemm (per-expert sorted-token dispatch) - triton/__init__.py: export both Verified on B200: max_abs_err 0.07-0.18 (rel ~0.3%) vs dequant reference, well under the 0.5 INT4-noise threshold; grouped path matches. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
…lackwell-02-08-int4-fused-silu # Conflicts: # docs/BLACKWELL_KERNELS_WIP.md
Completes the SM100 INT4 MoE expert path on top of sub-task 7's GEMM:
- batchgen_kernels/triton/fused_int4_grouped_silu.py:
* silu_mul epilogue (silu(gate)*up, FP32 math) matching the SM90a stage-1
* fused_int4_grouped_silu (stage-1 SwiGLU activation)
* int4_expert_mlp (full gate+up+SiLU+down expert)
* int4_grouped_moe_forward (per-expert masked loop, fp32 accumulation,
slot-specific routing-weight reduction)
- int4_single_expert_wgmma.py: single_expert_int4_forward dispatches to the
Triton int4_expert_mlp on sm100 (no _C load)
- fused_int4_wgmma_grouped.py: is_int4_grouped_wgmma_available() True on sm100
via Triton without loading the Hopper _C extension
- triton/__init__.py: export the new kernels
Verified on B200: silu_mul/expert_mlp rel err ~0.4-0.6%; single-expert sm100
dispatch matches int4_expert_mlp; grouped MoE matches per-token reference.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
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Closes #231. Part of #204 (Blackwell Phase 2).
Summary
New triton/fused_int4_grouped_silu.py: silu(gate) * up with INT4 weights. V1: two int4_grouped_gemm calls + Triton silu_mul kernel.
Spec
blackwell-kernel-port-v1.md § Sub-task 8