Tolerate extra SYN bytes in preamble

[brocci]

As reported in issue #28:

[BUG] A third SYN byte desyncs the preamble and drops the frame

• Status: still present in v1.7.0 (unchanged logic).
• Spec: LCS-9.10.1 p.3 ("A message starts with two SYN ... characters provide data receivers to synchronize"), p.5 §D.
• Code: src/CMRI.cpp:175-187 (PREAMBLE_2, PREAMBLE_3).
• In PREAMBLE_3, any byte other than STX — including another 0xFF — resets to PREAMBLE_1. So the sequence FF FF FF 02 ... is rejected: the third 0xFF falls to the else branch, and the following STX is then discarded in PREAMBLE_1. The spec specifies exactly two SYNs, so a strictly conforming host (JMRI) works, but SYN is explicitly a synchronization/idle character; hosts or converters that pad with extra 0xFF (or line idle reading as 0xFF after a break) make every frame invisible to this node. The v1.7.0 test suite's resync test (test/test_cmri/test_main.cpp:180-195) covers a lone 0xFF in garbage but not the triple-SYN case, so this remains untested upstream.
• Failure scenario: a master that transmits 3+ SYNs for receiver settling (common on RS-485 with slow-enabling drivers) gets zero responses from this node, ever.
• Fix: in PREAMBLE_3, if (c == 0xFF) stay in PREAMBLE_3; before the STX/else tests.

This PR implements the required fix and adds corresponding tests.