Complete RV64 psABI interoperability contracts - #337
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Implement RISC-V C ABI lowering for required integer sign and zero extensions, empty aggregates, one- and two-register aggregates, indirect large parameters, structure returns, and call-site attributes. Add fixed-parameter C variadic declarations, frontend validation for scalar variadic arguments, and default argument promotions for narrow integers and f32 values. Fix aggregate staging and reconstruction so partial register chunks cannot read beyond the source object, and correct AArch64 AAPCS64 handling for homogeneous floating aggregates, integer-class aggregates, and indirect parameters larger than sixteen bytes. Add executable C-to-Wave and Wave-to-C ABI fixtures for RISC-V LP64, LP64F, and LP64D, x86_64 SysV, and AArch64 AAPCS64. Cover scalar extensions, floating-point registers, pointers, nested and padded aggregates, stack arguments, variadics, and large by-reference values. Lock down RISC-V PIC and static relocations, A-extension atomic lowering and fallback libcalls, compressed-instruction ELF flags and instruction encodings, IR and bitcode target metadata, and inline assembly register and control-flow contracts. Move the legacy Wave corpus from test/ into tests/cases/, update the runner and ownership documentation, exclude test sources from GitHub language detection, and expand architecture-named CI jobs with native and cross ABI contract execution.
Correct C ABI lowering for odd-sized aggregates by separating object layout from architecture-specific transport types for parameters and returns. Drive C variadic default promotions from semantic expression types, preserve signed and unsigned extension rules, reject untyped null arguments, allow explicitly typed null pointers, and safely discard scalar and aggregate call results. Apply narrow integer ABI attributes consistently across x86_64 SysV, Darwin, AArch64 Darwin, Windows GNU, and RISC-V targets, with Clang IR contract comparisons and bidirectional C interoperability fixtures. Add pre-link RISC-V ELF and archive ABI validation for LP64, LP64F, and LP64D inputs, including archive member diagnostics, before invoking the external linker. Bundle Wave-owned Linux crt1, Scrt1, rcrt1, crti, and crtn objects for x86_64 and AArch64 and for every supported RISC-V floating-point ABI. Assemble them from repository sources at Cargo build and package time, select them before any system CRT, and preserve the target ELF machine and RISC-V e_flags contracts. Expand CI and regression coverage for CRT packaging, irregular aggregate sizes, variadic expressions, discarded returns, cross-target runtime discovery, ARM64 UDP execution, and x86_64/AArch64/RISC-V C interop. Make completed architecture jobs fail visibly and isolate parallel test temporary directories.
Analyze resolved proto implementations before lowering their methods into backend function nodes. Move method bodies instead of cloning them so semantic expression-type identities remain valid, while preventing lowered proto symbols from being registered twice during code generation. Normalize NUL padding in BSD extended archive member names so RISC-V ELF metadata inside Darwin archives is inspected and reported as archive(member). Add a focused archive parser regression covering the LP64F flags used by pre-link ABI validation. Accept both opaque-pointer and integer spellings for the single-register x86_64 SysV pointer aggregate in Clang IR contract tests. These Clang host-build representations use the same INTEGER-class GPR transport while Wave keeps its stable pointer representation. This restores the proto E2E cases on Linux and RISC-V, the RISC-V archive mismatch test on macOS, and the aggregate ABI contract test on Windows without weakening the actual C interop checks.
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Summary
tests/casesand exclude test sources from GitHub language statisticsRationale
RISC-V support needs executable ABI evidence rather than object-generation-only checks. The previous lowering did not fully model the RV64 integer extension, aggregate, and variadic rules, and it lacked automated contracts for relocation models and ISA-dependent lowering. Adding equivalent fixtures for other supported architectures also exposed an AArch64 aggregate classification error that could pass ordinary Rust and Wave tests while failing at the native C boundary.
Validation
cargo fmt --all --checkcargo test --locked --all-targets— 30 passedcargo clippy --locked --all-targets -- -D warningscargo build --locked --releaseWAVE_RUN_RISCV64_INTEROP_TESTS=1 cargo test --locked --test codegen_regressions riscv64_ -- --nocapture— 8 passedpython3 tools/run_tests.py— 96 passed, 12 architecture/environment skips, 0 failedgit diff --check